OpenE2K/qemu-e2k
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qemu-e2k/target
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Richard Henderson 5e34df7cc9 target/s390x: Implement LOAD/STORE TO REAL ADDRESS inline 
These are trivially done by performing a memory operation
with the correct mmu_idx.  The only tricky part is using
get_address directly in order to get the address wrapped;
we cannot use la2 because of the format.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20191211203614.15611-3-richard.henderson@linaro.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-12-18 12:57:29 +01:00
..
alpha target/alpha: fetch code with translator_ld 2019-10-28 15:12:38 +00:00
arm target/arm: ensure we use current exception state after SCR update 2019-12-16 10:52:58 +00:00
cris cputlb: ensure _cmmu helper functions follow the naming standard 2019-10-28 15:12:38 +00:00
hppa target/hppa: fetch code with translator_ld 2019-10-28 15:12:38 +00:00
i386 i386: Use g_autofree in a few places 2019-12-13 16:32:19 -03:00
lm32
m68k target/m68k: fetch code with translator_ld 2019-10-28 15:12:38 +00:00
microblaze target/microblaze: Plug temp leak around eval_cond_jmp() 2019-11-12 16:35:26 +01:00
mips target/mips: Refactor handling of vector compare 'less than' (signed) instructions 2019-10-25 18:37:01 +02:00
moxie
nios2
openrisc target/openrisc: fetch code with translator_ld 2019-10-28 15:12:38 +00:00
ppc target/ppc: Add SPR TBU40 2019-12-17 10:39:48 +11:00
riscv target/riscv: Remove atomic accesses to MIP CSR 2019-11-14 09:53:28 -08:00
s390x target/s390x: Implement LOAD/STORE TO REAL ADDRESS inline 2019-12-18 12:57:29 +01:00
sh4 target/sh4: fetch code with translator_ld 2019-10-28 15:12:38 +00:00
sparc target/sparc: Define an enumeration for accessing env->regwptr 2019-11-06 13:35:25 +01:00
tilegx
tricore
unicore32
xtensa target/xtensa: fetch code with translator_ld 2019-10-28 15:12:38 +00:00