386 lines
10 KiB
C
386 lines
10 KiB
C
/*
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* S/390 misc helper routines
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*
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* Copyright (c) 2009 Ulrich Hecht
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* Copyright (c) 2009 Alexander Graf
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "cpu.h"
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#include "exec/memory.h"
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#include "qemu/host-utils.h"
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#include "helper.h"
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#include <string.h>
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#include "sysemu/kvm.h"
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#include "qemu/timer.h"
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#ifdef CONFIG_KVM
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#include <linux/kvm.h>
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#endif
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#if !defined(CONFIG_USER_ONLY)
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#include "exec/softmmu_exec.h"
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#include "sysemu/sysemu.h"
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#endif
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/* #define DEBUG_HELPER */
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#ifdef DEBUG_HELPER
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#define HELPER_LOG(x...) qemu_log(x)
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#else
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#define HELPER_LOG(x...)
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#endif
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/* Raise an exception dynamically from a helper function. */
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void QEMU_NORETURN runtime_exception(CPUS390XState *env, int excp,
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uintptr_t retaddr)
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{
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int t;
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env->exception_index = EXCP_PGM;
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env->int_pgm_code = excp;
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/* Use the (ultimate) callers address to find the insn that trapped. */
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cpu_restore_state(env, retaddr);
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/* Advance past the insn. */
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t = cpu_ldub_code(env, env->psw.addr);
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env->int_pgm_ilen = t = get_ilen(t);
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env->psw.addr += 2 * t;
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cpu_loop_exit(env);
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}
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/* Raise an exception statically from a TB. */
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void HELPER(exception)(CPUS390XState *env, uint32_t excp)
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{
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HELPER_LOG("%s: exception %d\n", __func__, excp);
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env->exception_index = excp;
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cpu_loop_exit(env);
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}
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#ifndef CONFIG_USER_ONLY
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void program_interrupt(CPUS390XState *env, uint32_t code, int ilen)
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{
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qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n",
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env->psw.addr);
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if (kvm_enabled()) {
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#ifdef CONFIG_KVM
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kvm_s390_interrupt(s390_env_get_cpu(env), KVM_S390_PROGRAM_INT, code);
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#endif
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} else {
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env->int_pgm_code = code;
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env->int_pgm_ilen = ilen;
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env->exception_index = EXCP_PGM;
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cpu_loop_exit(env);
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}
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}
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/* SCLP service call */
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uint32_t HELPER(servc)(CPUS390XState *env, uint32_t r1, uint64_t r2)
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{
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int r;
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r = sclp_service_call(r1, r2);
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if (r < 0) {
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program_interrupt(env, -r, 4);
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return 0;
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}
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return r;
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}
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/* DIAG */
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uint64_t HELPER(diag)(CPUS390XState *env, uint32_t num, uint64_t mem,
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uint64_t code)
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{
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uint64_t r;
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switch (num) {
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case 0x500:
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/* KVM hypercall */
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r = s390_virtio_hypercall(env, mem, code);
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break;
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case 0x44:
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/* yield */
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r = 0;
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break;
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case 0x308:
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/* ipl */
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r = 0;
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break;
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default:
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r = -1;
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break;
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}
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if (r) {
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program_interrupt(env, PGM_OPERATION, ILEN_LATER_INC);
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}
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return r;
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}
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/* Set Prefix */
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void HELPER(spx)(CPUS390XState *env, uint64_t a1)
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{
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uint32_t prefix = a1 & 0x7fffe000;
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env->psa = prefix;
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qemu_log("prefix: %#x\n", prefix);
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tlb_flush_page(env, 0);
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tlb_flush_page(env, TARGET_PAGE_SIZE);
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}
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static inline uint64_t clock_value(CPUS390XState *env)
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{
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uint64_t time;
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time = env->tod_offset +
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time2tod(qemu_get_clock_ns(vm_clock) - env->tod_basetime);
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return time;
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}
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/* Store Clock */
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uint64_t HELPER(stck)(CPUS390XState *env)
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{
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return clock_value(env);
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}
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/* Store Clock Extended */
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uint32_t HELPER(stcke)(CPUS390XState *env, uint64_t a1)
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{
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cpu_stb_data(env, a1, 0);
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/* basically the same value as stck */
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cpu_stq_data(env, a1 + 1, clock_value(env) | env->cpu_num);
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/* more fine grained than stck */
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cpu_stq_data(env, a1 + 9, 0);
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/* XXX programmable fields */
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cpu_stw_data(env, a1 + 17, 0);
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return 0;
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}
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/* Set Clock Comparator */
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void HELPER(sckc)(CPUS390XState *env, uint64_t time)
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{
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if (time == -1ULL) {
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return;
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}
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/* difference between now and then */
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time -= clock_value(env);
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/* nanoseconds */
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time = (time * 125) >> 9;
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qemu_mod_timer(env->tod_timer, qemu_get_clock_ns(vm_clock) + time);
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}
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/* Store Clock Comparator */
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uint64_t HELPER(stckc)(CPUS390XState *env)
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{
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/* XXX implement */
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return 0;
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}
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/* Set CPU Timer */
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void HELPER(spt)(CPUS390XState *env, uint64_t time)
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{
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if (time == -1ULL) {
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return;
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}
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/* nanoseconds */
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time = (time * 125) >> 9;
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qemu_mod_timer(env->cpu_timer, qemu_get_clock_ns(vm_clock) + time);
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}
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/* Store CPU Timer */
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uint64_t HELPER(stpt)(CPUS390XState *env)
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{
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/* XXX implement */
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return 0;
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}
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/* Store System Information */
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uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint32_t r0,
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uint32_t r1)
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{
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int cc = 0;
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int sel1, sel2;
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if ((r0 & STSI_LEVEL_MASK) <= STSI_LEVEL_3 &&
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((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK))) {
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/* valid function code, invalid reserved bits */
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program_interrupt(env, PGM_SPECIFICATION, 2);
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}
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sel1 = r0 & STSI_R0_SEL1_MASK;
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sel2 = r1 & STSI_R1_SEL2_MASK;
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/* XXX: spec exception if sysib is not 4k-aligned */
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switch (r0 & STSI_LEVEL_MASK) {
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case STSI_LEVEL_1:
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if ((sel1 == 1) && (sel2 == 1)) {
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/* Basic Machine Configuration */
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struct sysib_111 sysib;
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memset(&sysib, 0, sizeof(sysib));
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ebcdic_put(sysib.manuf, "QEMU ", 16);
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/* same as machine type number in STORE CPU ID */
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ebcdic_put(sysib.type, "QEMU", 4);
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/* same as model number in STORE CPU ID */
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ebcdic_put(sysib.model, "QEMU ", 16);
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ebcdic_put(sysib.sequence, "QEMU ", 16);
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ebcdic_put(sysib.plant, "QEMU", 4);
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cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
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} else if ((sel1 == 2) && (sel2 == 1)) {
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/* Basic Machine CPU */
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struct sysib_121 sysib;
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memset(&sysib, 0, sizeof(sysib));
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/* XXX make different for different CPUs? */
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ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
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ebcdic_put(sysib.plant, "QEMU", 4);
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stw_p(&sysib.cpu_addr, env->cpu_num);
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cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
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} else if ((sel1 == 2) && (sel2 == 2)) {
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/* Basic Machine CPUs */
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struct sysib_122 sysib;
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memset(&sysib, 0, sizeof(sysib));
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stl_p(&sysib.capability, 0x443afc29);
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/* XXX change when SMP comes */
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stw_p(&sysib.total_cpus, 1);
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stw_p(&sysib.active_cpus, 1);
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stw_p(&sysib.standby_cpus, 0);
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stw_p(&sysib.reserved_cpus, 0);
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cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
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} else {
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cc = 3;
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}
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break;
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case STSI_LEVEL_2:
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{
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if ((sel1 == 2) && (sel2 == 1)) {
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/* LPAR CPU */
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struct sysib_221 sysib;
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memset(&sysib, 0, sizeof(sysib));
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/* XXX make different for different CPUs? */
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ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
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ebcdic_put(sysib.plant, "QEMU", 4);
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stw_p(&sysib.cpu_addr, env->cpu_num);
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stw_p(&sysib.cpu_id, 0);
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cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
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} else if ((sel1 == 2) && (sel2 == 2)) {
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/* LPAR CPUs */
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struct sysib_222 sysib;
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memset(&sysib, 0, sizeof(sysib));
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stw_p(&sysib.lpar_num, 0);
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sysib.lcpuc = 0;
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/* XXX change when SMP comes */
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stw_p(&sysib.total_cpus, 1);
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stw_p(&sysib.conf_cpus, 1);
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stw_p(&sysib.standby_cpus, 0);
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stw_p(&sysib.reserved_cpus, 0);
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ebcdic_put(sysib.name, "QEMU ", 8);
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stl_p(&sysib.caf, 1000);
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stw_p(&sysib.dedicated_cpus, 0);
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stw_p(&sysib.shared_cpus, 0);
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cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
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} else {
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cc = 3;
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}
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break;
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}
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case STSI_LEVEL_3:
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{
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if ((sel1 == 2) && (sel2 == 2)) {
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/* VM CPUs */
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struct sysib_322 sysib;
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memset(&sysib, 0, sizeof(sysib));
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sysib.count = 1;
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/* XXX change when SMP comes */
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stw_p(&sysib.vm[0].total_cpus, 1);
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stw_p(&sysib.vm[0].conf_cpus, 1);
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stw_p(&sysib.vm[0].standby_cpus, 0);
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stw_p(&sysib.vm[0].reserved_cpus, 0);
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ebcdic_put(sysib.vm[0].name, "KVMguest", 8);
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stl_p(&sysib.vm[0].caf, 1000);
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ebcdic_put(sysib.vm[0].cpi, "KVM/Linux ", 16);
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cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
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} else {
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cc = 3;
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}
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break;
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}
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case STSI_LEVEL_CURRENT:
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env->regs[0] = STSI_LEVEL_3;
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break;
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default:
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cc = 3;
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break;
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}
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return cc;
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}
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uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1,
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uint64_t cpu_addr)
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{
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int cc = 0;
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HELPER_LOG("%s: %016" PRIx64 " %08x %016" PRIx64 "\n",
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__func__, order_code, r1, cpu_addr);
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/* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register"
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as parameter (input). Status (output) is always R1. */
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switch (order_code) {
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case SIGP_SET_ARCH:
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/* switch arch */
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break;
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case SIGP_SENSE:
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/* enumerate CPU status */
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if (cpu_addr) {
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/* XXX implement when SMP comes */
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return 3;
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}
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env->regs[r1] &= 0xffffffff00000000ULL;
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cc = 1;
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break;
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#if !defined(CONFIG_USER_ONLY)
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case SIGP_RESTART:
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qemu_system_reset_request();
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cpu_loop_exit(env);
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break;
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case SIGP_STOP:
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qemu_system_shutdown_request();
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cpu_loop_exit(env);
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break;
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#endif
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default:
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/* unknown sigp */
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fprintf(stderr, "XXX unknown sigp: 0x%" PRIx64 "\n", order_code);
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cc = 3;
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}
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return cc;
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}
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#endif
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