6d5bb0b896
Remove a comment suggesting that we need to call tb_flush() after writing the SPARC signal frame trampoline insns. This isn't necessary in QEMU, because (even if the guest architecture requires explicit icache maintenance) we ensure that memory writes result in invalidation of translated code from that memory. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20181009184017.15675-1-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu> |
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| .. | ||
| cpu_loop.c | ||
| signal.c | ||
| sockbits.h | ||
| syscall_nr.h | ||
| target_cpu.h | ||
| target_elf.h | ||
| target_errno.h | ||
| target_fcntl.h | ||
| target_signal.h | ||
| target_structs.h | ||
| target_syscall.h | ||
| termbits.h | ||