qemu-e2k/gdb-xml
Jiajie Chen 17ffe331a9
target/loongarch: Split fcc register to fcc0-7 in gdbstub
Since GDB 13.1(GDB commit ea3352172), GDB LoongArch changed to use
fcc0-7 instead of fcc register. This commit partially reverts commit
2f149c759 (`target/loongarch: Update gdb_set_fpu() and gdb_get_fpu()`)
to match the behavior of GDB.

Note that it is a breaking change for GDB 13.0 or earlier, but it is
also required for GDB 13.1 or later to work.

Signed-off-by: Jiajie Chen <c@jia.je>
Acked-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230808054315.3391465-1-c@jia.je>
Signed-off-by: Song Gao <gaosong@loongson.cn>
2023-08-24 11:17:59 +08:00
..
aarch64-core.xml
aarch64-fpu.xml
aarch64-pauth.xml target/arm: Report pauth information to gdb as 'pauth_v2' 2023-04-20 10:21:16 +01:00
arm-core.xml
arm-m-profile-mve.xml target/arm: Advertise MVE to gdb when present 2021-11-02 14:14:55 -04:00
arm-m-profile.xml target/arm: Use correct GDB XML for M-profile cores 2020-05-14 15:03:08 +01:00
arm-neon.xml target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML 2021-09-30 13:42:10 +01:00
arm-vfp3.xml target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML 2021-09-30 13:42:10 +01:00
arm-vfp-sysregs.xml target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML 2021-09-30 13:42:10 +01:00
arm-vfp.xml target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML 2021-09-30 13:42:10 +01:00
avr-cpu.xml target/avr: CPU class: Add GDB support 2020-07-10 17:58:32 +02:00
cf-core.xml
cf-fp.xml
hexagon-core.xml Hexagon: add core gdbstub xml data for LLDB 2023-05-18 12:40:52 -07:00
hexagon-hvx.xml Hexagon (gdbstub): add HVX support 2023-05-18 12:40:52 -07:00
i386-32bit.xml gdb-xml: Fix size of EFER register on i386 architecture when debugged by GDB 2022-11-06 09:48:26 +01:00
i386-64bit.xml gdbstub: Fix i386/x86_64 machine description and add control registers 2019-02-05 16:50:18 +01:00
loongarch-base32.xml target/loongarch: Add GDB support for loongarch32 mode 2023-08-24 11:17:56 +08:00
loongarch-base64.xml target/loongarch: update loongarch-base64.xml 2022-08-05 10:02:40 -07:00
loongarch-fpu.xml target/loongarch: Split fcc register to fcc0-7 in gdbstub 2023-08-24 11:17:59 +08:00
m68k-core.xml target/m68k: fix gdb for m68xxx 2020-05-06 09:29:26 +01:00
m68k-fp.xml target-m68k: define 96bit FP registers for gdb on 680x0 2017-06-21 22:11:12 +02:00
microblaze-core.xml target/microblaze: Add gdbstub xml 2023-02-21 08:52:17 -10:00
microblaze-stack-protect.xml target/microblaze: Add gdbstub xml 2023-02-21 08:52:17 -10:00
power64-core.xml
power-altivec.xml
power-core.xml
power-fpu.xml
power-spe.xml
power-vsx.xml target-ppc: gdbstub: Add VSX support 2016-01-30 23:37:38 +11:00
riscv-32bit-cpu.xml target/riscv: remove fixed numbering from GDB xml feature files 2022-09-27 07:04:38 +10:00
riscv-32bit-fpu.xml target/riscv: remove fixed numbering from GDB xml feature files 2022-09-27 07:04:38 +10:00
riscv-32bit-virtual.xml target/riscv: Expose "priv" register for GDB for reads 2019-10-28 07:47:29 -07:00
riscv-64bit-cpu.xml target/riscv: remove fixed numbering from GDB xml feature files 2022-09-27 07:04:38 +10:00
riscv-64bit-fpu.xml target/riscv: remove fixed numbering from GDB xml feature files 2022-09-27 07:04:38 +10:00
riscv-64bit-virtual.xml target/riscv: Expose "priv" register for GDB for reads 2019-10-28 07:47:29 -07:00
rx-core.xml target/rx: CPU definitions 2020-03-19 17:58:05 +01:00
s390-acr.xml s390x/gdb: add the feature xml files for s390x 2014-09-01 09:45:19 +02:00
s390-cr.xml s390x/gdb: support reading/writing of control registers 2015-09-07 16:10:43 +02:00
s390-fpr.xml s390x/gdb: add the feature xml files for s390x 2014-09-01 09:45:19 +02:00
s390-gs.xml s390x/gdb: add gs registers 2017-07-14 12:29:49 +02:00
s390-virt-kvm.xml s390x/gdb: Split s390-virt.xml 2023-04-28 08:05:37 +02:00
s390-virt.xml s390x/gdb: Split s390-virt.xml 2023-04-28 08:05:37 +02:00
s390-vx.xml gdb-xml: Include XML for s390 vector registers 2015-05-27 17:52:03 +02:00
s390x-core64.xml s390x/gdb: add the feature xml files for s390x 2014-09-01 09:45:19 +02:00