Bastian Koppelmann 5f30046f15 target-tricore: Several translator and cpu model fixes ... Fix tc1796 cpu model using wrong ISA version. Fix cond_add sometimes writing back wrong result. Fix RCR_SEL and RCR_SELN using wrong registers for result and cond. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>		2015-01-26 19:56:45 +00:00
..
cpu-qom.h	target-tricore: Remove the dummy interrupt boilerplate	2014-09-25 18:54:22 +01:00
cpu.c	target-tricore: Several translator and cpu model fixes	2015-01-26 19:56:45 +00:00
cpu.h	target-tricore: Remove the dummy interrupt boilerplate	2014-09-25 18:54:22 +01:00
csfr.def	target-tricore: Fix new typos	2015-01-15 10:44:13 +03:00
helper.c	target-tricore: Remove the dummy interrupt boilerplate	2014-09-25 18:54:22 +01:00
helper.h	target-tricore: Add instructions of RR1 opcode format, that have 0xb3 as first opcode	2014-12-21 18:35:49 +00:00
Makefile.objs
op_helper.c	target-tricore: Several translator and cpu model fixes	2015-01-26 19:56:45 +00:00
translate.c	target-tricore: Several translator and cpu model fixes	2015-01-26 19:56:45 +00:00
tricore-defs.h
tricore-opcodes.h	target-tricore: Fix new typos	2015-01-15 10:44:13 +03:00