qemu-e2k/target
Maciej S. Szmigiero 6093637b4d vmbus: Print a warning when enabled without the recommended set of features
Some Windows versions crash at boot or fail to enable the VMBus device if
they don't see the expected set of Hyper-V features (enlightenments).

Since this provides poor user experience let's warn user if the VMBus
device is enabled without the recommended set of Hyper-V features.

The recommended set is the minimum set of Hyper-V features required to make
the VMBus device work properly in Windows Server versions 2016, 2019 and
2022.

Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
2024-03-08 14:18:56 +01:00
..
alpha target/alpha: Enable TARGET_PAGE_BITS_VARY for user-only 2024-02-29 11:35:37 -10:00
arm target/arm: Do memory type alignment check when translation enabled 2024-03-05 13:22:56 +00:00
avr gdbstub: Infer number of core registers from XML 2024-02-28 09:09:58 +00:00
cris
hexagon gdbstub: Infer number of core registers from XML 2024-02-28 09:09:58 +00:00
hppa target/hppa: Restore unwind_breg before calculating ior 2024-03-03 06:41:19 +01:00
i386 vmbus: Print a warning when enabled without the recommended set of features 2024-03-08 14:18:56 +01:00
loongarch target/loongarch: honour show_opcodes when disassembling 2024-03-06 12:35:51 +00:00
m68k gdbstub: Infer number of core registers from XML 2024-02-28 09:09:58 +00:00
microblaze gdbstub: Infer number of core registers from XML 2024-02-28 09:09:58 +00:00
mips
nios2
openrisc
ppc target/ppc: Enable TARGET_PAGE_BITS_VARY for user-only 2024-02-29 11:35:37 -10:00
riscv gdbstub: Add members to identify registers to GDBFeature 2024-02-28 09:10:11 +00:00
rx gdbstub: Infer number of core registers from XML 2024-02-28 09:09:58 +00:00
s390x gdbstub: Infer number of core registers from XML 2024-02-28 09:09:58 +00:00
sh4
sparc accel/tcg: Add tlb_fill_flags to CPUTLBEntryFull 2024-03-05 13:22:56 +00:00
tricore
xtensa
Kconfig
meson.build
target-common.c