Avinesh Kumar 60caf2216b target-ppc: add vextu[bhw][lr]x instructions ... vextublx: Vector Extract Unsigned Byte Left vextuhlx: Vector Extract Unsigned Halfword Left vextuwlx: Vector Extract Unsigned Word Left vextubrx: Vector Extract Unsigned Byte Right-Indexed VX-form vextuhrx: Vector Extract Unsigned Halfword Right-Indexed VX-form vextuwrx: Vector Extract Unsigned Word Right-Indexed VX-form Signed-off-by: Avinesh Kumar <avinesku@linux.vnet.ibm.com> Signed-off-by: Hariharan T.S. <hari@linux.vnet.ibm.com> [ implement using int128_rshift ] Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>		2017-01-31 10:10:13 +11:00
..
dfp-impl.inc.c
dfp-ops.inc.c
fp-impl.inc.c
fp-ops.inc.c	target-ppc: implement stxsd and stxssp	2017-01-31 10:10:12 +11:00
spe-impl.inc.c
spe-ops.inc.c
vmx-impl.inc.c	target-ppc: add vextu[bhw][lr]x instructions	2017-01-31 10:10:13 +11:00
vmx-ops.inc.c	target-ppc: add vextu[bhw][lr]x instructions	2017-01-31 10:10:13 +11:00
vsx-impl.inc.c	target-ppc: implement lxv/lxvx and stxv/stxvx	2017-01-31 10:10:12 +11:00
vsx-ops.inc.c	target-ppc: implement lxv/lxvx and stxv/stxvx	2017-01-31 10:10:12 +11:00