Ravi Bangoria 6358320228 target-ppc: Implement mfvsrld instruction ... mfvsrld: Move From VSR Lower Doubleword Signed-off-by: Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>		2016-10-05 11:05:28 +11:00
..
dfp-impl.inc.c	ppc: Rename #include'd .c files to .inc.c	2016-09-07 12:40:12 +10:00
dfp-ops.inc.c	ppc: Rename #include'd .c files to .inc.c	2016-09-07 12:40:12 +10:00
fp-impl.inc.c	target-ppc: convert st64 to use new macro	2016-09-23 10:29:40 +10:00
fp-ops.inc.c	target-ppc: convert st64 to use new macro	2016-09-23 10:29:40 +10:00
spe-impl.inc.c	target-ppc: convert st64 to use new macro	2016-09-23 10:29:40 +10:00
spe-ops.inc.c	ppc: Rename #include'd .c files to .inc.c	2016-09-07 12:40:12 +10:00
vmx-impl.inc.c	target-ppc: convert st64 to use new macro	2016-09-23 10:29:40 +10:00
vmx-ops.inc.c	target-ppc: add vector permute right indexed instruction	2016-09-23 10:29:40 +10:00
vsx-impl.inc.c	target-ppc: Implement mfvsrld instruction	2016-10-05 11:05:28 +11:00
vsx-ops.inc.c	target-ppc: Implement mfvsrld instruction	2016-10-05 11:05:28 +11:00