3bfe57165b
When there are more nodes than available memory to put the minimum allowed memory by node, all the memory is put on the last node. This is because we put (ram_size / nb_numa_nodes) & ~((1 << mc->numa_mem_align_shift) - 1); on each node, and in this case the value is 0. This is particularly true with pseries, as the memory must be aligned to 256MB. To avoid this problem, this patch uses an error diffusion algorithm [1] to distribute equally the memory on nodes. We introduce numa_auto_assign_ram() function in MachineClass to keep compatibility between machine type versions. The legacy function is used with pseries-2.9, pc-q35-2.9 and pc-i440fx-2.9 (and previous), the new one with all others. Example: qemu-system-ppc64 -S -nographic -nodefaults -monitor stdio -m 1G -smp 8 \ -numa node -numa node -numa node \ -numa node -numa node -numa node Before: (qemu) info numa 6 nodes node 0 cpus: 0 6 node 0 size: 0 MB node 1 cpus: 1 7 node 1 size: 0 MB node 2 cpus: 2 node 2 size: 0 MB node 3 cpus: 3 node 3 size: 0 MB node 4 cpus: 4 node 4 size: 0 MB node 5 cpus: 5 node 5 size: 1024 MB After: (qemu) info numa 6 nodes node 0 cpus: 0 6 node 0 size: 0 MB node 1 cpus: 1 7 node 1 size: 256 MB node 2 cpus: 2 node 2 size: 0 MB node 3 cpus: 3 node 3 size: 256 MB node 4 cpus: 4 node 4 size: 256 MB node 5 cpus: 5 node 5 size: 256 MB [1] https://en.wikipedia.org/wiki/Error_diffusion Signed-off-by: Laurent Vivier <lvivier@redhat.com> Message-Id: <20170502162955.1610-2-lvivier@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> [ehabkost: s/ram_size/size/ at numa_default_auto_assign_ram()] Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
764 lines
23 KiB
C
764 lines
23 KiB
C
/*
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* NUMA parameter parsing routines
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*
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* Copyright (c) 2014 Fujitsu Ltd.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "sysemu/numa.h"
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#include "exec/cpu-common.h"
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#include "exec/ramlist.h"
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#include "qemu/bitmap.h"
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#include "qom/cpu.h"
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#include "qemu/error-report.h"
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#include "include/exec/cpu-common.h" /* for RAM_ADDR_FMT */
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#include "qapi-visit.h"
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#include "qapi/opts-visitor.h"
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#include "hw/boards.h"
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#include "sysemu/hostmem.h"
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#include "qmp-commands.h"
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#include "hw/mem/pc-dimm.h"
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#include "qemu/option.h"
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#include "qemu/config-file.h"
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QemuOptsList qemu_numa_opts = {
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.name = "numa",
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.implied_opt_name = "type",
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.head = QTAILQ_HEAD_INITIALIZER(qemu_numa_opts.head),
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.desc = { { 0 } } /* validated with OptsVisitor */
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};
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static int have_memdevs = -1;
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static int max_numa_nodeid; /* Highest specified NUMA node ID, plus one.
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* For all nodes, nodeid < max_numa_nodeid
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*/
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int nb_numa_nodes;
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bool have_numa_distance;
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NodeInfo numa_info[MAX_NODES];
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void numa_set_mem_node_id(ram_addr_t addr, uint64_t size, uint32_t node)
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{
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struct numa_addr_range *range;
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/*
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* Memory-less nodes can come here with 0 size in which case,
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* there is nothing to do.
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*/
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if (!size) {
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return;
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}
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range = g_malloc0(sizeof(*range));
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range->mem_start = addr;
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range->mem_end = addr + size - 1;
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QLIST_INSERT_HEAD(&numa_info[node].addr, range, entry);
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}
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void numa_unset_mem_node_id(ram_addr_t addr, uint64_t size, uint32_t node)
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{
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struct numa_addr_range *range, *next;
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QLIST_FOREACH_SAFE(range, &numa_info[node].addr, entry, next) {
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if (addr == range->mem_start && (addr + size - 1) == range->mem_end) {
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QLIST_REMOVE(range, entry);
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g_free(range);
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return;
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}
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}
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}
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static void numa_set_mem_ranges(void)
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{
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int i;
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ram_addr_t mem_start = 0;
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/*
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* Deduce start address of each node and use it to store
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* the address range info in numa_info address range list
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*/
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for (i = 0; i < nb_numa_nodes; i++) {
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numa_set_mem_node_id(mem_start, numa_info[i].node_mem, i);
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mem_start += numa_info[i].node_mem;
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}
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}
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/*
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* Check if @addr falls under NUMA @node.
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*/
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static bool numa_addr_belongs_to_node(ram_addr_t addr, uint32_t node)
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{
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struct numa_addr_range *range;
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QLIST_FOREACH(range, &numa_info[node].addr, entry) {
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if (addr >= range->mem_start && addr <= range->mem_end) {
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return true;
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}
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}
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return false;
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}
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/*
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* Given an address, return the index of the NUMA node to which the
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* address belongs to.
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*/
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uint32_t numa_get_node(ram_addr_t addr, Error **errp)
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{
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uint32_t i;
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/* For non NUMA configurations, check if the addr falls under node 0 */
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if (!nb_numa_nodes) {
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if (numa_addr_belongs_to_node(addr, 0)) {
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return 0;
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}
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}
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for (i = 0; i < nb_numa_nodes; i++) {
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if (numa_addr_belongs_to_node(addr, i)) {
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return i;
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}
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}
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error_setg(errp, "Address 0x" RAM_ADDR_FMT " doesn't belong to any "
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"NUMA node", addr);
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return -1;
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}
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static void parse_numa_node(NumaNodeOptions *node, QemuOpts *opts, Error **errp)
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{
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uint16_t nodenr;
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uint16List *cpus = NULL;
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if (node->has_nodeid) {
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nodenr = node->nodeid;
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} else {
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nodenr = nb_numa_nodes;
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}
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if (nodenr >= MAX_NODES) {
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error_setg(errp, "Max number of NUMA nodes reached: %"
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PRIu16 "", nodenr);
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return;
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}
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if (numa_info[nodenr].present) {
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error_setg(errp, "Duplicate NUMA nodeid: %" PRIu16, nodenr);
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return;
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}
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for (cpus = node->cpus; cpus; cpus = cpus->next) {
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if (cpus->value >= max_cpus) {
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error_setg(errp,
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"CPU index (%" PRIu16 ")"
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" should be smaller than maxcpus (%d)",
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cpus->value, max_cpus);
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return;
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}
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bitmap_set(numa_info[nodenr].node_cpu, cpus->value, 1);
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}
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if (node->has_mem && node->has_memdev) {
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error_setg(errp, "qemu: cannot specify both mem= and memdev=");
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return;
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}
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if (have_memdevs == -1) {
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have_memdevs = node->has_memdev;
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}
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if (node->has_memdev != have_memdevs) {
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error_setg(errp, "qemu: memdev option must be specified for either "
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"all or no nodes");
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return;
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}
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if (node->has_mem) {
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uint64_t mem_size = node->mem;
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const char *mem_str = qemu_opt_get(opts, "mem");
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/* Fix up legacy suffix-less format */
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if (g_ascii_isdigit(mem_str[strlen(mem_str) - 1])) {
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mem_size <<= 20;
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}
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numa_info[nodenr].node_mem = mem_size;
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}
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if (node->has_memdev) {
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Object *o;
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o = object_resolve_path_type(node->memdev, TYPE_MEMORY_BACKEND, NULL);
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if (!o) {
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error_setg(errp, "memdev=%s is ambiguous", node->memdev);
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return;
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}
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object_ref(o);
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numa_info[nodenr].node_mem = object_property_get_int(o, "size", NULL);
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numa_info[nodenr].node_memdev = MEMORY_BACKEND(o);
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}
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numa_info[nodenr].present = true;
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max_numa_nodeid = MAX(max_numa_nodeid, nodenr + 1);
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}
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static void parse_numa_distance(NumaDistOptions *dist, Error **errp)
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{
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uint16_t src = dist->src;
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uint16_t dst = dist->dst;
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uint8_t val = dist->val;
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if (src >= MAX_NODES || dst >= MAX_NODES) {
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error_setg(errp,
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"Invalid node %" PRIu16
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", max possible could be %" PRIu16,
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MAX(src, dst), MAX_NODES);
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return;
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}
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if (!numa_info[src].present || !numa_info[dst].present) {
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error_setg(errp, "Source/Destination NUMA node is missing. "
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"Please use '-numa node' option to declare it first.");
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return;
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}
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if (val < NUMA_DISTANCE_MIN) {
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error_setg(errp, "NUMA distance (%" PRIu8 ") is invalid, "
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"it shouldn't be less than %d.",
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val, NUMA_DISTANCE_MIN);
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return;
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}
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if (src == dst && val != NUMA_DISTANCE_MIN) {
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error_setg(errp, "Local distance of node %d should be %d.",
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src, NUMA_DISTANCE_MIN);
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return;
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}
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numa_info[src].distance[dst] = val;
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have_numa_distance = true;
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}
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static int parse_numa(void *opaque, QemuOpts *opts, Error **errp)
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{
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NumaOptions *object = NULL;
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Error *err = NULL;
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{
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Visitor *v = opts_visitor_new(opts);
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visit_type_NumaOptions(v, NULL, &object, &err);
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visit_free(v);
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}
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if (err) {
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goto end;
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}
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switch (object->type) {
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case NUMA_OPTIONS_TYPE_NODE:
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parse_numa_node(&object->u.node, opts, &err);
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if (err) {
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goto end;
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}
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nb_numa_nodes++;
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break;
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case NUMA_OPTIONS_TYPE_DIST:
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parse_numa_distance(&object->u.dist, &err);
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if (err) {
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goto end;
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}
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break;
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default:
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abort();
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}
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end:
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qapi_free_NumaOptions(object);
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if (err) {
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error_report_err(err);
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return -1;
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}
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return 0;
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}
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static char *enumerate_cpus(unsigned long *cpus, int max_cpus)
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{
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int cpu;
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bool first = true;
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GString *s = g_string_new(NULL);
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for (cpu = find_first_bit(cpus, max_cpus);
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cpu < max_cpus;
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cpu = find_next_bit(cpus, max_cpus, cpu + 1)) {
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g_string_append_printf(s, "%s%d", first ? "" : " ", cpu);
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first = false;
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}
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return g_string_free(s, FALSE);
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}
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static void validate_numa_cpus(void)
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{
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int i;
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unsigned long *seen_cpus = bitmap_new(max_cpus);
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for (i = 0; i < nb_numa_nodes; i++) {
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if (bitmap_intersects(seen_cpus, numa_info[i].node_cpu, max_cpus)) {
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bitmap_and(seen_cpus, seen_cpus,
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numa_info[i].node_cpu, max_cpus);
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error_report("CPU(s) present in multiple NUMA nodes: %s",
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enumerate_cpus(seen_cpus, max_cpus));
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g_free(seen_cpus);
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exit(EXIT_FAILURE);
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}
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bitmap_or(seen_cpus, seen_cpus,
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numa_info[i].node_cpu, max_cpus);
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}
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if (!bitmap_full(seen_cpus, max_cpus)) {
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char *msg;
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bitmap_complement(seen_cpus, seen_cpus, max_cpus);
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msg = enumerate_cpus(seen_cpus, max_cpus);
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error_report("warning: CPU(s) not present in any NUMA nodes: %s", msg);
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error_report("warning: All CPU(s) up to maxcpus should be described "
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"in NUMA config");
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g_free(msg);
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}
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g_free(seen_cpus);
|
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}
|
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|
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/* If all node pair distances are symmetric, then only distances
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* in one direction are enough. If there is even one asymmetric
|
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* pair, though, then all distances must be provided. The
|
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* distance from a node to itself is always NUMA_DISTANCE_MIN,
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* so providing it is never necessary.
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*/
|
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static void validate_numa_distance(void)
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{
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int src, dst;
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bool is_asymmetrical = false;
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for (src = 0; src < nb_numa_nodes; src++) {
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for (dst = src; dst < nb_numa_nodes; dst++) {
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if (numa_info[src].distance[dst] == 0 &&
|
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numa_info[dst].distance[src] == 0) {
|
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if (src != dst) {
|
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error_report("The distance between node %d and %d is "
|
|
"missing, at least one distance value "
|
|
"between each nodes should be provided.",
|
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src, dst);
|
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exit(EXIT_FAILURE);
|
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}
|
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}
|
|
|
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if (numa_info[src].distance[dst] != 0 &&
|
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numa_info[dst].distance[src] != 0 &&
|
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numa_info[src].distance[dst] !=
|
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numa_info[dst].distance[src]) {
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is_asymmetrical = true;
|
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}
|
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}
|
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}
|
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|
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if (is_asymmetrical) {
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for (src = 0; src < nb_numa_nodes; src++) {
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for (dst = 0; dst < nb_numa_nodes; dst++) {
|
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if (src != dst && numa_info[src].distance[dst] == 0) {
|
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error_report("At least one asymmetrical pair of "
|
|
"distances is given, please provide distances "
|
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"for both directions of all node pairs.");
|
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exit(EXIT_FAILURE);
|
|
}
|
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}
|
|
}
|
|
}
|
|
}
|
|
|
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static void complete_init_numa_distance(void)
|
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{
|
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int src, dst;
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|
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/* Fixup NUMA distance by symmetric policy because if it is an
|
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* asymmetric distance table, it should be a complete table and
|
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* there would not be any missing distance except local node, which
|
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* is verified by validate_numa_distance above.
|
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*/
|
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for (src = 0; src < nb_numa_nodes; src++) {
|
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for (dst = 0; dst < nb_numa_nodes; dst++) {
|
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if (numa_info[src].distance[dst] == 0) {
|
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if (src == dst) {
|
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numa_info[src].distance[dst] = NUMA_DISTANCE_MIN;
|
|
} else {
|
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numa_info[src].distance[dst] = numa_info[dst].distance[src];
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
void numa_legacy_auto_assign_ram(MachineClass *mc, NodeInfo *nodes,
|
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int nb_nodes, ram_addr_t size)
|
|
{
|
|
int i;
|
|
uint64_t usedmem = 0;
|
|
|
|
/* Align each node according to the alignment
|
|
* requirements of the machine class
|
|
*/
|
|
|
|
for (i = 0; i < nb_nodes - 1; i++) {
|
|
nodes[i].node_mem = (size / nb_nodes) &
|
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~((1 << mc->numa_mem_align_shift) - 1);
|
|
usedmem += nodes[i].node_mem;
|
|
}
|
|
nodes[i].node_mem = size - usedmem;
|
|
}
|
|
|
|
void numa_default_auto_assign_ram(MachineClass *mc, NodeInfo *nodes,
|
|
int nb_nodes, ram_addr_t size)
|
|
{
|
|
int i;
|
|
uint64_t usedmem = 0, node_mem;
|
|
uint64_t granularity = size / nb_nodes;
|
|
uint64_t propagate = 0;
|
|
|
|
for (i = 0; i < nb_nodes - 1; i++) {
|
|
node_mem = (granularity + propagate) &
|
|
~((1 << mc->numa_mem_align_shift) - 1);
|
|
propagate = granularity + propagate - node_mem;
|
|
nodes[i].node_mem = node_mem;
|
|
usedmem += node_mem;
|
|
}
|
|
nodes[i].node_mem = size - usedmem;
|
|
}
|
|
|
|
void parse_numa_opts(MachineClass *mc)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < MAX_NODES; i++) {
|
|
numa_info[i].node_cpu = bitmap_new(max_cpus);
|
|
}
|
|
|
|
if (qemu_opts_foreach(qemu_find_opts("numa"), parse_numa, NULL, NULL)) {
|
|
exit(1);
|
|
}
|
|
|
|
assert(max_numa_nodeid <= MAX_NODES);
|
|
|
|
/* No support for sparse NUMA node IDs yet: */
|
|
for (i = max_numa_nodeid - 1; i >= 0; i--) {
|
|
/* Report large node IDs first, to make mistakes easier to spot */
|
|
if (!numa_info[i].present) {
|
|
error_report("numa: Node ID missing: %d", i);
|
|
exit(1);
|
|
}
|
|
}
|
|
|
|
/* This must be always true if all nodes are present: */
|
|
assert(nb_numa_nodes == max_numa_nodeid);
|
|
|
|
if (nb_numa_nodes > 0) {
|
|
uint64_t numa_total;
|
|
|
|
if (nb_numa_nodes > MAX_NODES) {
|
|
nb_numa_nodes = MAX_NODES;
|
|
}
|
|
|
|
/* If no memory size is given for any node, assume the default case
|
|
* and distribute the available memory equally across all nodes
|
|
*/
|
|
for (i = 0; i < nb_numa_nodes; i++) {
|
|
if (numa_info[i].node_mem != 0) {
|
|
break;
|
|
}
|
|
}
|
|
if (i == nb_numa_nodes) {
|
|
assert(mc->numa_auto_assign_ram);
|
|
mc->numa_auto_assign_ram(mc, numa_info, nb_numa_nodes, ram_size);
|
|
}
|
|
|
|
numa_total = 0;
|
|
for (i = 0; i < nb_numa_nodes; i++) {
|
|
numa_total += numa_info[i].node_mem;
|
|
}
|
|
if (numa_total != ram_size) {
|
|
error_report("total memory for NUMA nodes (0x%" PRIx64 ")"
|
|
" should equal RAM size (0x" RAM_ADDR_FMT ")",
|
|
numa_total, ram_size);
|
|
exit(1);
|
|
}
|
|
|
|
for (i = 0; i < nb_numa_nodes; i++) {
|
|
QLIST_INIT(&numa_info[i].addr);
|
|
}
|
|
|
|
numa_set_mem_ranges();
|
|
|
|
for (i = 0; i < nb_numa_nodes; i++) {
|
|
if (!bitmap_empty(numa_info[i].node_cpu, max_cpus)) {
|
|
break;
|
|
}
|
|
}
|
|
/* Historically VCPUs were assigned in round-robin order to NUMA
|
|
* nodes. However it causes issues with guest not handling it nice
|
|
* in case where cores/threads from a multicore CPU appear on
|
|
* different nodes. So allow boards to override default distribution
|
|
* rule grouping VCPUs by socket so that VCPUs from the same socket
|
|
* would be on the same node.
|
|
*/
|
|
if (i == nb_numa_nodes) {
|
|
for (i = 0; i < max_cpus; i++) {
|
|
unsigned node_id = i % nb_numa_nodes;
|
|
if (mc->cpu_index_to_socket_id) {
|
|
node_id = mc->cpu_index_to_socket_id(i) % nb_numa_nodes;
|
|
}
|
|
|
|
set_bit(i, numa_info[node_id].node_cpu);
|
|
}
|
|
}
|
|
|
|
validate_numa_cpus();
|
|
|
|
/* QEMU needs at least all unique node pair distances to build
|
|
* the whole NUMA distance table. QEMU treats the distance table
|
|
* as symmetric by default, i.e. distance A->B == distance B->A.
|
|
* Thus, QEMU is able to complete the distance table
|
|
* initialization even though only distance A->B is provided and
|
|
* distance B->A is not. QEMU knows the distance of a node to
|
|
* itself is always 10, so A->A distances may be omitted. When
|
|
* the distances of two nodes of a pair differ, i.e. distance
|
|
* A->B != distance B->A, then that means the distance table is
|
|
* asymmetric. In this case, the distances for both directions
|
|
* of all node pairs are required.
|
|
*/
|
|
if (have_numa_distance) {
|
|
/* Validate enough NUMA distance information was provided. */
|
|
validate_numa_distance();
|
|
|
|
/* Validation succeeded, now fill in any missing distances. */
|
|
complete_init_numa_distance();
|
|
}
|
|
} else {
|
|
numa_set_mem_node_id(0, ram_size, 0);
|
|
}
|
|
}
|
|
|
|
void numa_post_machine_init(void)
|
|
{
|
|
CPUState *cpu;
|
|
int i;
|
|
|
|
CPU_FOREACH(cpu) {
|
|
for (i = 0; i < nb_numa_nodes; i++) {
|
|
assert(cpu->cpu_index < max_cpus);
|
|
if (test_bit(cpu->cpu_index, numa_info[i].node_cpu)) {
|
|
cpu->numa_node = i;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
static void allocate_system_memory_nonnuma(MemoryRegion *mr, Object *owner,
|
|
const char *name,
|
|
uint64_t ram_size)
|
|
{
|
|
if (mem_path) {
|
|
#ifdef __linux__
|
|
Error *err = NULL;
|
|
memory_region_init_ram_from_file(mr, owner, name, ram_size, false,
|
|
mem_path, &err);
|
|
if (err) {
|
|
error_report_err(err);
|
|
if (mem_prealloc) {
|
|
exit(1);
|
|
}
|
|
|
|
/* Legacy behavior: if allocation failed, fall back to
|
|
* regular RAM allocation.
|
|
*/
|
|
memory_region_init_ram(mr, owner, name, ram_size, &error_fatal);
|
|
}
|
|
#else
|
|
fprintf(stderr, "-mem-path not supported on this host\n");
|
|
exit(1);
|
|
#endif
|
|
} else {
|
|
memory_region_init_ram(mr, owner, name, ram_size, &error_fatal);
|
|
}
|
|
vmstate_register_ram_global(mr);
|
|
}
|
|
|
|
void memory_region_allocate_system_memory(MemoryRegion *mr, Object *owner,
|
|
const char *name,
|
|
uint64_t ram_size)
|
|
{
|
|
uint64_t addr = 0;
|
|
int i;
|
|
|
|
if (nb_numa_nodes == 0 || !have_memdevs) {
|
|
allocate_system_memory_nonnuma(mr, owner, name, ram_size);
|
|
return;
|
|
}
|
|
|
|
memory_region_init(mr, owner, name, ram_size);
|
|
for (i = 0; i < MAX_NODES; i++) {
|
|
uint64_t size = numa_info[i].node_mem;
|
|
HostMemoryBackend *backend = numa_info[i].node_memdev;
|
|
if (!backend) {
|
|
continue;
|
|
}
|
|
MemoryRegion *seg = host_memory_backend_get_memory(backend,
|
|
&error_fatal);
|
|
|
|
if (memory_region_is_mapped(seg)) {
|
|
char *path = object_get_canonical_path_component(OBJECT(backend));
|
|
error_report("memory backend %s is used multiple times. Each "
|
|
"-numa option must use a different memdev value.",
|
|
path);
|
|
exit(1);
|
|
}
|
|
|
|
host_memory_backend_set_mapped(backend, true);
|
|
memory_region_add_subregion(mr, addr, seg);
|
|
vmstate_register_ram_global(seg);
|
|
addr += size;
|
|
}
|
|
}
|
|
|
|
static void numa_stat_memory_devices(uint64_t node_mem[])
|
|
{
|
|
MemoryDeviceInfoList *info_list = NULL;
|
|
MemoryDeviceInfoList **prev = &info_list;
|
|
MemoryDeviceInfoList *info;
|
|
|
|
qmp_pc_dimm_device_list(qdev_get_machine(), &prev);
|
|
for (info = info_list; info; info = info->next) {
|
|
MemoryDeviceInfo *value = info->value;
|
|
|
|
if (value) {
|
|
switch (value->type) {
|
|
case MEMORY_DEVICE_INFO_KIND_DIMM:
|
|
node_mem[value->u.dimm.data->node] += value->u.dimm.data->size;
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
qapi_free_MemoryDeviceInfoList(info_list);
|
|
}
|
|
|
|
void query_numa_node_mem(uint64_t node_mem[])
|
|
{
|
|
int i;
|
|
|
|
if (nb_numa_nodes <= 0) {
|
|
return;
|
|
}
|
|
|
|
numa_stat_memory_devices(node_mem);
|
|
for (i = 0; i < nb_numa_nodes; i++) {
|
|
node_mem[i] += numa_info[i].node_mem;
|
|
}
|
|
}
|
|
|
|
static int query_memdev(Object *obj, void *opaque)
|
|
{
|
|
MemdevList **list = opaque;
|
|
MemdevList *m = NULL;
|
|
|
|
if (object_dynamic_cast(obj, TYPE_MEMORY_BACKEND)) {
|
|
m = g_malloc0(sizeof(*m));
|
|
|
|
m->value = g_malloc0(sizeof(*m->value));
|
|
|
|
m->value->id = object_property_get_str(obj, "id", NULL);
|
|
m->value->has_id = !!m->value->id;
|
|
|
|
m->value->size = object_property_get_int(obj, "size",
|
|
&error_abort);
|
|
m->value->merge = object_property_get_bool(obj, "merge",
|
|
&error_abort);
|
|
m->value->dump = object_property_get_bool(obj, "dump",
|
|
&error_abort);
|
|
m->value->prealloc = object_property_get_bool(obj,
|
|
"prealloc",
|
|
&error_abort);
|
|
m->value->policy = object_property_get_enum(obj,
|
|
"policy",
|
|
"HostMemPolicy",
|
|
&error_abort);
|
|
object_property_get_uint16List(obj, "host-nodes",
|
|
&m->value->host_nodes,
|
|
&error_abort);
|
|
|
|
m->next = *list;
|
|
*list = m;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
MemdevList *qmp_query_memdev(Error **errp)
|
|
{
|
|
Object *obj = object_get_objects_root();
|
|
MemdevList *list = NULL;
|
|
|
|
object_child_foreach(obj, query_memdev, &list);
|
|
return list;
|
|
}
|
|
|
|
int numa_get_node_for_cpu(int idx)
|
|
{
|
|
int i;
|
|
|
|
assert(idx < max_cpus);
|
|
|
|
for (i = 0; i < nb_numa_nodes; i++) {
|
|
if (test_bit(idx, numa_info[i].node_cpu)) {
|
|
break;
|
|
}
|
|
}
|
|
return i;
|
|
}
|
|
|
|
void ram_block_notifier_add(RAMBlockNotifier *n)
|
|
{
|
|
QLIST_INSERT_HEAD(&ram_list.ramblock_notifiers, n, next);
|
|
}
|
|
|
|
void ram_block_notifier_remove(RAMBlockNotifier *n)
|
|
{
|
|
QLIST_REMOVE(n, next);
|
|
}
|
|
|
|
void ram_block_notify_add(void *host, size_t size)
|
|
{
|
|
RAMBlockNotifier *notifier;
|
|
|
|
QLIST_FOREACH(notifier, &ram_list.ramblock_notifiers, next) {
|
|
notifier->ram_block_added(notifier, host, size);
|
|
}
|
|
}
|
|
|
|
void ram_block_notify_remove(void *host, size_t size)
|
|
{
|
|
RAMBlockNotifier *notifier;
|
|
|
|
QLIST_FOREACH(notifier, &ram_list.ramblock_notifiers, next) {
|
|
notifier->ram_block_removed(notifier, host, size);
|
|
}
|
|
}
|