Paolo Bonzini 64130fa4a1 q35: implement high SMRAM ... When H_SMRAME is 1, low memory at 0xa0000 is left alone by SMM, and instead the chipset maps the 0xa0000-0xbffff window at 0xfeda0000-0xfedbffff. This affects both the "non-SMM" view controlled by D_OPEN and the SMM view controlled by G_SMRAME, so add two new MemoryRegions and toggle the enabled/disabled state of all four in mch_update_smram. Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>		2015-06-05 17:36:39 +02:00
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apb.c	Switch non-CPU callers from ld/st*_phys to address_space_ld/st*	2015-04-26 16:49:24 +01:00
bonito.c	Convert (ffs(val) - 1) to ctz32(val)	2015-04-28 15:36:08 +02:00
gpex.c	pci: Add generic PCIe host bridge	2015-02-13 05:46:07 +00:00
grackle.c	pci: Trivial device model conversions to realize	2015-02-26 12:42:16 +01:00
Makefile.objs	pci: Add generic PCIe host bridge	2015-02-13 05:46:07 +00:00
pam.c	hw/i386: remove smram_update	2015-06-05 17:36:39 +02:00
piix.c	hw/i386: remove smram_update	2015-06-05 17:36:39 +02:00
ppce500.c	pci: Trivial device model conversions to realize	2015-02-26 12:42:16 +01:00
prep.c	exec.c: Make address_space_rw take transaction attributes	2015-04-26 16:49:24 +01:00
q35.c	q35: implement high SMRAM	2015-06-05 17:36:39 +02:00
uninorth.c	uninorth: convert ffs(3) to ctz32()	2015-04-28 15:36:08 +02:00
versatile.c	pci: Trivial device model conversions to realize	2015-02-26 12:42:16 +01:00