64407f6a9e
xtensa core may have only one set of DBREAKA/DBREAKC registers. Don't hardcode register numbers in the test as 0 and 1, use macros that only index valid DBREAK* registers. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> |
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.. | ||
crt.S | ||
fpu.h | ||
linker.ld.S | ||
macros.inc | ||
Makefile.softmmu-target | ||
test_b.S | ||
test_bi.S | ||
test_boolean.S | ||
test_break.S | ||
test_bz.S | ||
test_cache.S | ||
test_clamps.S | ||
test_dfp0_arith.S | ||
test_exclusive.S | ||
test_extui.S | ||
test_flix.S | ||
test_fp0_arith.S | ||
test_fp0_conv.S | ||
test_fp0_div.S | ||
test_fp0_sqrt.S | ||
test_fp1.S | ||
test_fp_cpenable.S | ||
test_interrupt.S | ||
test_load_store.S | ||
test_loop.S | ||
test_lsc.S | ||
test_mac16.S | ||
test_max.S | ||
test_min.S | ||
test_mmu.S | ||
test_mul16.S | ||
test_mul32.S | ||
test_nsa.S | ||
test_phys_mem.S | ||
test_quo.S | ||
test_rem.S | ||
test_rst0.S | ||
test_s32c1i.S | ||
test_sar.S | ||
test_sext.S | ||
test_shift.S | ||
test_sr.S | ||
test_timer.S | ||
test_windowed.S | ||
vectors.S |