a8d2532645
No header includes qemu-common.h after this commit, as prescribed by qemu-common.h's file comment. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190523143508.25387-5-armbru@redhat.com> [Rebased with conflicts resolved automatically, except for include/hw/arm/xlnx-zynqmp.h hw/arm/nrf51_soc.c hw/arm/msf2-soc.c block/qcow2-refcount.c block/qcow2-cluster.c block/qcow2-cache.c target/arm/cpu.h target/lm32/cpu.h target/m68k/cpu.h target/mips/cpu.h target/moxie/cpu.h target/nios2/cpu.h target/openrisc/cpu.h target/riscv/cpu.h target/tilegx/cpu.h target/tricore/cpu.h target/unicore32/cpu.h target/xtensa/cpu.h; bsd-user/main.c and net/tap-bsd.c fixed up]
119 lines
3.6 KiB
C
119 lines
3.6 KiB
C
/*
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* Generic device-tree-driven paravirt PPC e500 platform
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*
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* Copyright 2012 Freescale Semiconductor, Inc.
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*
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* This is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include "qemu/osdep.h"
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#include "qemu/units.h"
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#include "e500.h"
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#include "hw/net/fsl_etsec/etsec.h"
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#include "hw/boards.h"
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#include "sysemu/device_tree.h"
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#include "sysemu/kvm.h"
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#include "hw/sysbus.h"
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#include "hw/pci/pci.h"
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#include "hw/ppc/openpic.h"
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#include "kvm_ppc.h"
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static void e500plat_fixup_devtree(void *fdt)
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{
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const char model[] = "QEMU ppce500";
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const char compatible[] = "fsl,qemu-e500";
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qemu_fdt_setprop(fdt, "/", "model", model, sizeof(model));
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qemu_fdt_setprop(fdt, "/", "compatible", compatible,
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sizeof(compatible));
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}
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static void e500plat_init(MachineState *machine)
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{
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PPCE500MachineClass *pmc = PPCE500_MACHINE_GET_CLASS(machine);
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/* Older KVM versions don't support EPR which breaks guests when we announce
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MPIC variants that support EPR. Revert to an older one for those */
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if (kvm_enabled() && !kvmppc_has_cap_epr()) {
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pmc->mpic_version = OPENPIC_MODEL_FSL_MPIC_20;
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}
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ppce500_init(machine);
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}
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static void e500plat_machine_device_plug_cb(HotplugHandler *hotplug_dev,
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DeviceState *dev, Error **errp)
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{
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PPCE500MachineState *pms = PPCE500_MACHINE(hotplug_dev);
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if (pms->pbus_dev) {
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if (object_dynamic_cast(OBJECT(dev), TYPE_SYS_BUS_DEVICE)) {
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platform_bus_link_device(pms->pbus_dev, SYS_BUS_DEVICE(dev));
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}
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}
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}
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static
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HotplugHandler *e500plat_machine_get_hotpug_handler(MachineState *machine,
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DeviceState *dev)
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{
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if (object_dynamic_cast(OBJECT(dev), TYPE_SYS_BUS_DEVICE)) {
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return HOTPLUG_HANDLER(machine);
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}
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return NULL;
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}
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#define TYPE_E500PLAT_MACHINE MACHINE_TYPE_NAME("ppce500")
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static void e500plat_machine_class_init(ObjectClass *oc, void *data)
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{
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PPCE500MachineClass *pmc = PPCE500_MACHINE_CLASS(oc);
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HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
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MachineClass *mc = MACHINE_CLASS(oc);
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assert(!mc->get_hotplug_handler);
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mc->get_hotplug_handler = e500plat_machine_get_hotpug_handler;
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hc->plug = e500plat_machine_device_plug_cb;
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pmc->pci_first_slot = 0x1;
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pmc->pci_nr_slots = PCI_SLOT_MAX - 1;
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pmc->fixup_devtree = e500plat_fixup_devtree;
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pmc->mpic_version = OPENPIC_MODEL_FSL_MPIC_42;
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pmc->has_mpc8xxx_gpio = true;
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pmc->has_platform_bus = true;
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pmc->platform_bus_base = 0xf00000000ULL;
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pmc->platform_bus_size = 128 * MiB;
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pmc->platform_bus_first_irq = 5;
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pmc->platform_bus_num_irqs = 10;
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pmc->ccsrbar_base = 0xFE0000000ULL;
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pmc->pci_pio_base = 0xFE1000000ULL;
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pmc->pci_mmio_base = 0xC00000000ULL;
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pmc->pci_mmio_bus_base = 0xE0000000ULL;
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pmc->spin_base = 0xFEF000000ULL;
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mc->desc = "generic paravirt e500 platform";
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mc->init = e500plat_init;
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mc->max_cpus = 32;
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mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("e500v2_v30");
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machine_class_allow_dynamic_sysbus_dev(mc, TYPE_ETSEC_COMMON);
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}
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static const TypeInfo e500plat_info = {
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.name = TYPE_E500PLAT_MACHINE,
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.parent = TYPE_PPCE500_MACHINE,
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.class_init = e500plat_machine_class_init,
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.interfaces = (InterfaceInfo[]) {
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{ TYPE_HOTPLUG_HANDLER },
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{ }
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}
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};
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static void e500plat_register_types(void)
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{
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type_register_static(&e500plat_info);
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}
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type_init(e500plat_register_types)
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