qemu-e2k/target/riscv/insn_trans
Peter Maydell 7d7fb11615 target/riscv: Honour -semihosting-config userspace=on and enable=on
The riscv target incorrectly enabled semihosting always, whether the
user asked for it or not.  Call semihosting_enabled() passing the
correct value to the is_userspace argument, which fixes this and also
handles the userspace=on argument.  Because we do this at translate
time, we no longer need to check the privilege level in
riscv_cpu_do_interrupt().

Note that this is a behaviour change: we used to default to
semihosting being enabled, and now the user must pass
"-semihosting-config enable=on" if they want it.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220822141230.3658237-8-peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-09-13 17:18:21 +01:00
..
trans_privileged.c.inc target/riscv: Honour -semihosting-config userspace=on and enable=on 2022-09-13 17:18:21 +01:00
trans_rva.c.inc
trans_rvb.c.inc target/riscv: rvk: add support for zbkx extension 2022-04-29 10:47:45 +10:00
trans_rvd.c.inc target/riscv: add support for zdinx 2022-03-03 13:14:50 +10:00
trans_rvf.c.inc target/riscv: add support for zfinx 2022-03-03 13:14:50 +10:00
trans_rvh.c.inc target/riscv: Minimize the calls to decode_save_opc 2022-07-03 10:03:20 +10:00
trans_rvi.c.inc target/riscv: Add Zihintpause support 2022-09-07 09:18:33 +02:00
trans_rvk.c.inc target/riscv: rvk: add support for zksed/zksh extension 2022-04-29 10:47:45 +10:00
trans_rvm.c.inc target/riscv: add support for zmmul extension v0.1 2022-06-10 09:31:42 +10:00
trans_rvv.c.inc target/riscv: rvv: Add mask agnostic for vector permutation instructions 2022-09-07 09:18:33 +02:00
trans_rvzfh.c.inc target/riscv: add support for zhinx/zhinxmin 2022-03-03 13:14:50 +10:00
trans_svinval.c.inc
trans_xventanacondops.c.inc