395e5fb442
The ACPI related header file acpi-defs.h, includes definitions that apply on other architectures as well. Move it in `include/hw/acpi/` to sanely include it from other architectures. Signed-off-by: Alvise Rigo <a.rigo@virtualopensystems.com> Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
369 lines
13 KiB
C
369 lines
13 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef QEMU_ACPI_DEFS_H
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#define QEMU_ACPI_DEFS_H
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enum {
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ACPI_FADT_F_WBINVD,
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ACPI_FADT_F_WBINVD_FLUSH,
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ACPI_FADT_F_PROC_C1,
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ACPI_FADT_F_P_LVL2_UP,
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ACPI_FADT_F_PWR_BUTTON,
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ACPI_FADT_F_SLP_BUTTON,
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ACPI_FADT_F_FIX_RTC,
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ACPI_FADT_F_RTC_S4,
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ACPI_FADT_F_TMR_VAL_EXT,
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ACPI_FADT_F_DCK_CAP,
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ACPI_FADT_F_RESET_REG_SUP,
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ACPI_FADT_F_SEALED_CASE,
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ACPI_FADT_F_HEADLESS,
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ACPI_FADT_F_CPU_SW_SLP,
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ACPI_FADT_F_PCI_EXP_WAK,
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ACPI_FADT_F_USE_PLATFORM_CLOCK,
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ACPI_FADT_F_S4_RTC_STS_VALID,
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ACPI_FADT_F_REMOTE_POWER_ON_CAPABLE,
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ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL,
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ACPI_FADT_F_FORCE_APIC_PHYSICAL_DESTINATION_MODE,
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ACPI_FADT_F_HW_REDUCED_ACPI,
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ACPI_FADT_F_LOW_POWER_S0_IDLE_CAPABLE,
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};
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/*
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* ACPI 2.0 Generic Address Space definition.
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*/
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struct Acpi20GenericAddress {
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uint8_t address_space_id;
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uint8_t register_bit_width;
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uint8_t register_bit_offset;
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uint8_t reserved;
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uint64_t address;
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} QEMU_PACKED;
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typedef struct Acpi20GenericAddress Acpi20GenericAddress;
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struct AcpiRsdpDescriptor { /* Root System Descriptor Pointer */
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uint64_t signature; /* ACPI signature, contains "RSD PTR " */
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uint8_t checksum; /* To make sum of struct == 0 */
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uint8_t oem_id [6]; /* OEM identification */
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uint8_t revision; /* Must be 0 for 1.0, 2 for 2.0 */
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uint32_t rsdt_physical_address; /* 32-bit physical address of RSDT */
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uint32_t length; /* XSDT Length in bytes including hdr */
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uint64_t xsdt_physical_address; /* 64-bit physical address of XSDT */
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uint8_t extended_checksum; /* Checksum of entire table */
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uint8_t reserved [3]; /* Reserved field must be 0 */
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} QEMU_PACKED;
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typedef struct AcpiRsdpDescriptor AcpiRsdpDescriptor;
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/* Table structure from Linux kernel (the ACPI tables are under the
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BSD license) */
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#define ACPI_TABLE_HEADER_DEF /* ACPI common table header */ \
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uint32_t signature; /* ACPI signature (4 ASCII characters) */ \
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uint32_t length; /* Length of table, in bytes, including header */ \
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uint8_t revision; /* ACPI Specification minor version # */ \
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uint8_t checksum; /* To make sum of entire table == 0 */ \
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uint8_t oem_id [6]; /* OEM identification */ \
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uint8_t oem_table_id [8]; /* OEM table identification */ \
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uint32_t oem_revision; /* OEM revision number */ \
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uint8_t asl_compiler_id [4]; /* ASL compiler vendor ID */ \
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uint32_t asl_compiler_revision; /* ASL compiler revision number */
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struct AcpiTableHeader /* ACPI common table header */
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{
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ACPI_TABLE_HEADER_DEF
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} QEMU_PACKED;
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typedef struct AcpiTableHeader AcpiTableHeader;
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/*
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* ACPI 1.0 Fixed ACPI Description Table (FADT)
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*/
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struct AcpiFadtDescriptorRev1
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{
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ACPI_TABLE_HEADER_DEF /* ACPI common table header */
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uint32_t firmware_ctrl; /* Physical address of FACS */
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uint32_t dsdt; /* Physical address of DSDT */
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uint8_t model; /* System Interrupt Model */
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uint8_t reserved1; /* Reserved */
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uint16_t sci_int; /* System vector of SCI interrupt */
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uint32_t smi_cmd; /* Port address of SMI command port */
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uint8_t acpi_enable; /* Value to write to smi_cmd to enable ACPI */
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uint8_t acpi_disable; /* Value to write to smi_cmd to disable ACPI */
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uint8_t S4bios_req; /* Value to write to SMI CMD to enter S4BIOS state */
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uint8_t reserved2; /* Reserved - must be zero */
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uint32_t pm1a_evt_blk; /* Port address of Power Mgt 1a acpi_event Reg Blk */
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uint32_t pm1b_evt_blk; /* Port address of Power Mgt 1b acpi_event Reg Blk */
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uint32_t pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */
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uint32_t pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk */
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uint32_t pm2_cnt_blk; /* Port address of Power Mgt 2 Control Reg Blk */
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uint32_t pm_tmr_blk; /* Port address of Power Mgt Timer Ctrl Reg Blk */
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uint32_t gpe0_blk; /* Port addr of General Purpose acpi_event 0 Reg Blk */
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uint32_t gpe1_blk; /* Port addr of General Purpose acpi_event 1 Reg Blk */
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uint8_t pm1_evt_len; /* Byte length of ports at pm1_x_evt_blk */
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uint8_t pm1_cnt_len; /* Byte length of ports at pm1_x_cnt_blk */
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uint8_t pm2_cnt_len; /* Byte Length of ports at pm2_cnt_blk */
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uint8_t pm_tmr_len; /* Byte Length of ports at pm_tm_blk */
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uint8_t gpe0_blk_len; /* Byte Length of ports at gpe0_blk */
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uint8_t gpe1_blk_len; /* Byte Length of ports at gpe1_blk */
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uint8_t gpe1_base; /* Offset in gpe model where gpe1 events start */
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uint8_t reserved3; /* Reserved */
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uint16_t plvl2_lat; /* Worst case HW latency to enter/exit C2 state */
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uint16_t plvl3_lat; /* Worst case HW latency to enter/exit C3 state */
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uint16_t flush_size; /* Size of area read to flush caches */
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uint16_t flush_stride; /* Stride used in flushing caches */
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uint8_t duty_offset; /* Bit location of duty cycle field in p_cnt reg */
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uint8_t duty_width; /* Bit width of duty cycle field in p_cnt reg */
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uint8_t day_alrm; /* Index to day-of-month alarm in RTC CMOS RAM */
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uint8_t mon_alrm; /* Index to month-of-year alarm in RTC CMOS RAM */
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uint8_t century; /* Index to century in RTC CMOS RAM */
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uint8_t reserved4; /* Reserved */
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uint8_t reserved4a; /* Reserved */
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uint8_t reserved4b; /* Reserved */
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uint32_t flags;
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} QEMU_PACKED;
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typedef struct AcpiFadtDescriptorRev1 AcpiFadtDescriptorRev1;
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/*
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* ACPI 1.0 Root System Description Table (RSDT)
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*/
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struct AcpiRsdtDescriptorRev1
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{
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ACPI_TABLE_HEADER_DEF /* ACPI common table header */
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uint32_t table_offset_entry[0]; /* Array of pointers to other */
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/* ACPI tables */
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} QEMU_PACKED;
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typedef struct AcpiRsdtDescriptorRev1 AcpiRsdtDescriptorRev1;
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/*
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* ACPI 1.0 Firmware ACPI Control Structure (FACS)
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*/
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struct AcpiFacsDescriptorRev1
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{
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uint32_t signature; /* ACPI Signature */
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uint32_t length; /* Length of structure, in bytes */
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uint32_t hardware_signature; /* Hardware configuration signature */
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uint32_t firmware_waking_vector; /* ACPI OS waking vector */
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uint32_t global_lock; /* Global Lock */
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uint32_t flags;
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uint8_t resverved3 [40]; /* Reserved - must be zero */
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} QEMU_PACKED;
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typedef struct AcpiFacsDescriptorRev1 AcpiFacsDescriptorRev1;
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/*
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* Differentiated System Description Table (DSDT)
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*/
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/*
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* MADT values and structures
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*/
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/* Values for MADT PCATCompat */
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#define ACPI_DUAL_PIC 0
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#define ACPI_MULTIPLE_APIC 1
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/* Master MADT */
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struct AcpiMultipleApicTable
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{
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ACPI_TABLE_HEADER_DEF /* ACPI common table header */
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uint32_t local_apic_address; /* Physical address of local APIC */
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uint32_t flags;
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} QEMU_PACKED;
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typedef struct AcpiMultipleApicTable AcpiMultipleApicTable;
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/* Values for Type in APIC sub-headers */
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#define ACPI_APIC_PROCESSOR 0
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#define ACPI_APIC_IO 1
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#define ACPI_APIC_XRUPT_OVERRIDE 2
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#define ACPI_APIC_NMI 3
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#define ACPI_APIC_LOCAL_NMI 4
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#define ACPI_APIC_ADDRESS_OVERRIDE 5
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#define ACPI_APIC_IO_SAPIC 6
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#define ACPI_APIC_LOCAL_SAPIC 7
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#define ACPI_APIC_XRUPT_SOURCE 8
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#define ACPI_APIC_RESERVED 9 /* 9 and greater are reserved */
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/*
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* MADT sub-structures (Follow MULTIPLE_APIC_DESCRIPTION_TABLE)
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*/
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#define ACPI_SUB_HEADER_DEF /* Common ACPI sub-structure header */\
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uint8_t type; \
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uint8_t length;
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/* Sub-structures for MADT */
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struct AcpiMadtProcessorApic
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{
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ACPI_SUB_HEADER_DEF
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uint8_t processor_id; /* ACPI processor id */
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uint8_t local_apic_id; /* Processor's local APIC id */
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uint32_t flags;
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} QEMU_PACKED;
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typedef struct AcpiMadtProcessorApic AcpiMadtProcessorApic;
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struct AcpiMadtIoApic
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{
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ACPI_SUB_HEADER_DEF
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uint8_t io_apic_id; /* I/O APIC ID */
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uint8_t reserved; /* Reserved - must be zero */
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uint32_t address; /* APIC physical address */
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uint32_t interrupt; /* Global system interrupt where INTI
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* lines start */
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} QEMU_PACKED;
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typedef struct AcpiMadtIoApic AcpiMadtIoApic;
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struct AcpiMadtIntsrcovr {
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ACPI_SUB_HEADER_DEF
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uint8_t bus;
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uint8_t source;
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uint32_t gsi;
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uint16_t flags;
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} QEMU_PACKED;
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typedef struct AcpiMadtIntsrcovr AcpiMadtIntsrcovr;
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struct AcpiMadtLocalNmi {
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ACPI_SUB_HEADER_DEF
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uint8_t processor_id; /* ACPI processor id */
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uint16_t flags; /* MPS INTI flags */
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uint8_t lint; /* Local APIC LINT# */
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} QEMU_PACKED;
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typedef struct AcpiMadtLocalNmi AcpiMadtLocalNmi;
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/*
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* HPET Description Table
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*/
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struct Acpi20Hpet {
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ACPI_TABLE_HEADER_DEF /* ACPI common table header */
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uint32_t timer_block_id;
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Acpi20GenericAddress addr;
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uint8_t hpet_number;
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uint16_t min_tick;
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uint8_t page_protect;
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} QEMU_PACKED;
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typedef struct Acpi20Hpet Acpi20Hpet;
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/*
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* SRAT (NUMA topology description) table
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*/
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struct AcpiSystemResourceAffinityTable
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{
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ACPI_TABLE_HEADER_DEF
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uint32_t reserved1;
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uint32_t reserved2[2];
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} QEMU_PACKED;
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typedef struct AcpiSystemResourceAffinityTable AcpiSystemResourceAffinityTable;
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#define ACPI_SRAT_PROCESSOR 0
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#define ACPI_SRAT_MEMORY 1
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struct AcpiSratProcessorAffinity
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{
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ACPI_SUB_HEADER_DEF
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uint8_t proximity_lo;
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uint8_t local_apic_id;
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uint32_t flags;
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uint8_t local_sapic_eid;
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uint8_t proximity_hi[3];
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uint32_t reserved;
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} QEMU_PACKED;
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typedef struct AcpiSratProcessorAffinity AcpiSratProcessorAffinity;
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struct AcpiSratMemoryAffinity
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{
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ACPI_SUB_HEADER_DEF
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uint8_t proximity[4];
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uint16_t reserved1;
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uint64_t base_addr;
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uint64_t range_length;
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uint32_t reserved2;
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uint32_t flags;
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uint32_t reserved3[2];
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} QEMU_PACKED;
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typedef struct AcpiSratMemoryAffinity AcpiSratMemoryAffinity;
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/* PCI fw r3.0 MCFG table. */
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/* Subtable */
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struct AcpiMcfgAllocation {
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uint64_t address; /* Base address, processor-relative */
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uint16_t pci_segment; /* PCI segment group number */
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uint8_t start_bus_number; /* Starting PCI Bus number */
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uint8_t end_bus_number; /* Final PCI Bus number */
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uint32_t reserved;
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} QEMU_PACKED;
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typedef struct AcpiMcfgAllocation AcpiMcfgAllocation;
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struct AcpiTableMcfg {
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ACPI_TABLE_HEADER_DEF;
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uint8_t reserved[8];
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AcpiMcfgAllocation allocation[0];
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} QEMU_PACKED;
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typedef struct AcpiTableMcfg AcpiTableMcfg;
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/*
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* TCPA Description Table
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*/
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struct Acpi20Tcpa {
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ACPI_TABLE_HEADER_DEF /* ACPI common table header */
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uint16_t platform_class;
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uint32_t log_area_minimum_length;
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uint64_t log_area_start_address;
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} QEMU_PACKED;
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typedef struct Acpi20Tcpa Acpi20Tcpa;
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/* DMAR - DMA Remapping table r2.2 */
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struct AcpiTableDmar {
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ACPI_TABLE_HEADER_DEF
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uint8_t host_address_width; /* Maximum DMA physical addressability */
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uint8_t flags;
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uint8_t reserved[10];
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} QEMU_PACKED;
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typedef struct AcpiTableDmar AcpiTableDmar;
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/* Masks for Flags field above */
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#define ACPI_DMAR_INTR_REMAP 1
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#define ACPI_DMAR_X2APIC_OPT_OUT (1 << 1)
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/* Values for sub-structure type for DMAR */
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enum {
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ACPI_DMAR_TYPE_HARDWARE_UNIT = 0, /* DRHD */
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ACPI_DMAR_TYPE_RESERVED_MEMORY = 1, /* RMRR */
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ACPI_DMAR_TYPE_ATSR = 2, /* ATSR */
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ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3, /* RHSR */
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ACPI_DMAR_TYPE_ANDD = 4, /* ANDD */
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ACPI_DMAR_TYPE_RESERVED = 5 /* Reserved for furture use */
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};
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/*
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* Sub-structures for DMAR
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*/
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/* Type 0: Hardware Unit Definition */
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struct AcpiDmarHardwareUnit {
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uint16_t type;
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uint16_t length;
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uint8_t flags;
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uint8_t reserved;
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uint16_t pci_segment; /* The PCI Segment associated with this unit */
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uint64_t address; /* Base address of remapping hardware register-set */
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} QEMU_PACKED;
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typedef struct AcpiDmarHardwareUnit AcpiDmarHardwareUnit;
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/* Masks for Flags field above */
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#define ACPI_DMAR_INCLUDE_PCI_ALL 1
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#endif
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