65dfad62a1
- fix read/write simcall mapping flags and return value; - use -serial option to direct console output of sim machine to QEMU chardev; - fix handling of unknown registers in the gdbstub. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJZNoftAAoJEFH5zJH4P6BE/D8P+gLL750NJPt5jDtyPFD0++Wl ELORyi0TjqarRTdhwf27Mrmq2IX/hUYPzwoHcGCLD9IWSwcjQKNAC2cUFyhx+kSs wawFUe8/AVRQHQN1PjL8MIGojro8jwrifYaHpodQcrQv4kq2hVdpjmq2+5ze4lff KZVpK4u9sVUDyilB8rGJzPLpV9W/b8lO8v908nreIUQivffmSWbfKAc2x0SzDzaJ br4F53RGW2Mgx1ZvHKCc+FNig8JoolMtRaPJGqYYkRZt6zO6i/hzFqUIICzKNxLb 4b97rsbA76nhMzWnIBzZo8FNym2QpNfT8d/ESmqA5zNcYy2MP78rSN7miPVqCNSg 0RRj3QRIwOliKVbMTTsGnqAoDGOLIrxIro0YjjG2lvERU4VAC4Evon2If5Hl7EVa l7JcKagV8xd9EO3AA8vvhQGh4nSU6mJUIsWhL3pxYETTov9xg9hSR1h4AyE/bk9m 9naCriwKVNmvnjhD7Y0zTnkuZ1XnjxOnD+MNlylZGYlY3b7G/AWAlw53zYgd6jZs tP+aEaa+xN/5i7Hlfk2oGkTn2NMCUvk8gZidBJKsO/TqNbHcyCwN7ISVdpWO5aIr h/Hfe/wYfa7djGBiHFgbNWlpnTXq18L3rQ6qAjKXE3OuXGjYcqk3KV9SiaWmGVyE Au9GCZsgkWbpHa/dBgkG =E8c8 -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/xtensa/tags/20170606-xtensa' into staging target/xtensa fixes: - fix read/write simcall mapping flags and return value; - use -serial option to direct console output of sim machine to QEMU chardev; - fix handling of unknown registers in the gdbstub. # gpg: Signature made Tue 06 Jun 2017 11:46:05 BST # gpg: using RSA key 0x51F9CC91F83FA044 # gpg: Good signature from "Max Filippov <filippov@cadence.com>" # gpg: aka "Max Filippov <max.filippov@cogentembedded.com>" # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" # Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044 * remotes/xtensa/tags/20170606-xtensa: target/xtensa: handle unknown registers in gdbstub target/xtensa: support output to chardev console target/xtensa: fix return value of read/write simcalls target/xtensa: fix mapping direction in read/write simcalls Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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cris | ||
hppa | ||
i386 | ||
lm32 | ||
m68k | ||
microblaze | ||
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moxie | ||
nios2 | ||
openrisc | ||
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sh4 | ||
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tilegx | ||
tricore | ||
unicore32 | ||
xtensa |