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qemu-e2k/accel
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Richard Henderson f5e6786de4 target-arm queue: 
* Support gdbstub (guest debug) in HVF
  * xnlx-versal: Support CANFD controller
  * bpim2u: New board model: Banana Pi BPI-M2 Ultra
  * Emulate FEAT_LSE2
  * allow DC CVA[D]P in user mode emulation
  * trap DCC access in user mode emulation
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Merge tag 'pull-target-arm-20230606' of https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
 * Support gdbstub (guest debug) in HVF
 * xnlx-versal: Support CANFD controller
 * bpim2u: New board model: Banana Pi BPI-M2 Ultra
 * Emulate FEAT_LSE2
 * allow DC CVA[D]P in user mode emulation
 * trap DCC access in user mode emulation

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# gpg: Signature made Tue 06 Jun 2023 02:47:17 AM PDT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg:                 aka "Peter Maydell <peter@archaic.org.uk>" [unknown]

* tag 'pull-target-arm-20230606' of https://git.linaro.org/people/pmaydell/qemu-arm: (42 commits)
  target/arm: trap DCC access in user mode emulation
  tests/tcg/aarch64: add DC CVA[D]P tests
  target/arm: allow DC CVA[D]P in user mode emulation
  target/arm: Enable FEAT_LSE2 for -cpu max
  tests/tcg/multiarch: Adjust sigbus.c
  tests/tcg/aarch64: Use stz2g in mte-7.c
  target/arm: Move mte check for store-exclusive
  target/arm: Relax ordered/atomic alignment checks for LSE2
  target/arm: Add SCTLR.nAA to TBFLAG_A64
  target/arm: Check alignment in helper_mte_check
  target/arm: Pass single_memop to gen_mte_checkN
  target/arm: Pass memop to gen_mte_check1*
  target/arm: Hoist finalize_memop out of do_fp_{ld, st}
  target/arm: Hoist finalize_memop out of do_gpr_{ld, st}
  target/arm: Load/store integer pair with one tcg operation
  target/arm: Sink gen_mte_check1 into load/store_exclusive
  target/arm: Use tcg_gen_qemu_{ld, st}_i128 in gen_sve_{ld, st}r
  target/arm: Use tcg_gen_qemu_st_i128 for STZG, STZ2G
  target/arm: Use tcg_gen_qemu_{st, ld}_i128 for do_fp_{st, ld}
  target/arm: Use tcg_gen_qemu_ld_i128 for LDXP
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-06-06 12:11:34 -07:00
..
hvf hvf: add guest debugging handlers for Apple Silicon hosts 2023-06-06 10:19:30 +01:00
kvm kvm: Enable dirty ring for arm64 2023-05-18 08:53:51 +02:00
qtest accel/qtest: Support qtest accelerator for Windows 2022-10-28 11:17:12 +02:00
stubs includes: move tb_flush into its own header 2023-03-07 17:06:33 +00:00
tcg accel/tcg: Fix undefined shift in store_whole_le16 2023-06-06 12:11:02 -07:00
xen accel/xen: Fix DM state change notification in dm_restrict mode 2023-03-23 09:56:54 +00:00
accel-blocker.c accel: introduce accelerator blocker API 2023-01-11 09:59:39 +01:00
accel-common.c gdbstub: move sstep flags probing into AccelClass 2022-10-06 11:53:41 +01:00
accel-softmmu.c *: Add missing includes of qemu/error-report.h 2023-03-22 15:06:57 +00:00
accel-softmmu.h accel: replace struct CpusAccel with AccelOpsClass 2021-02-05 10:24:15 -10:00
accel-user.c accel: extend AccelState and AccelClass to user-mode 2021-02-05 10:24:15 -10:00
dummy-cpus.c accel/qtest: Support qtest accelerator for Windows 2022-10-28 11:17:12 +02:00
Kconfig Add NVMM accelerator: configure and build logic 2021-05-04 14:15:34 +02:00
meson.build accel: introduce accelerator blocker API 2023-01-11 09:59:39 +01:00