qemu-e2k/target
Halil Pasic 66dc50f705 s390x: improve error handling for SSCH and RSCH
Simplify the error handling of the SSCH and RSCH handler avoiding
arbitrary and cryptic error codes being used to tell how the instruction
is supposed to end.  Let the code detecting the condition tell how it's
to be handled in a less ambiguous way.  It's best to handle SSCH and RSCH
in one go as the emulation of the two shares a lot of code.

For passthrough this change isn't pure refactoring, but changes the way
kernel reported EFAULT is handled. After clarifying the kernel interface
we decided that EFAULT shall be mapped to unit exception.  Same goes for
unexpected error codes and absence of required ORB flags.

Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com>
Message-Id: <20171017140453.51099-4-pasic@linux.vnet.ibm.com>
Tested-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com>
[CH: cosmetic changes]
Reviewed-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20 13:32:10 +02:00
..
alpha tcg: remove addr argument from lookup_tb_ptr 2017-10-10 07:37:10 -07:00
arm target/arm: Implement SG instruction corner cases 2017-10-12 13:23:14 +01:00
cris qom/cpu: move cpu_model null check to cpu_class_by_name() 2017-10-09 23:21:52 -03:00
hppa tcg: remove addr argument from lookup_tb_ptr 2017-10-10 07:37:10 -07:00
i386 target/i386: trap on instructions longer than >15 bytes 2017-10-16 18:03:53 +02:00
lm32 qom/cpu: move cpu_model null check to cpu_class_by_name() 2017-10-09 23:21:52 -03:00
m68k qom/cpu: move cpu_model null check to cpu_class_by_name() 2017-10-09 23:21:52 -03:00
microblaze target: [tcg] Use a generic enum for DISAS_ values 2017-09-06 08:06:47 -07:00
mips linux-user: Tidy and enforce reserved_va initialization 2017-10-16 16:00:56 +03:00
moxie qom/cpu: move cpu_model null check to cpu_class_by_name() 2017-10-09 23:21:52 -03:00
nios2 * TCG 8-byte atomic accesses bugfix (Andrew) 2017-10-19 15:38:07 +01:00
openrisc qom/cpu: move cpu_model null check to cpu_class_by_name() 2017-10-09 23:21:52 -03:00
ppc * TCG 8-byte atomic accesses bugfix (Andrew) 2017-10-19 15:38:07 +01:00
s390x s390x: improve error handling for SSCH and RSCH 2017-10-20 13:32:10 +02:00
sh4 linux-user/sh4: Reduce TARGET_VIRT_ADDR_SPACE_BITS to 31 2017-10-16 16:00:56 +03:00
sparc qom/cpu: move cpu_model null check to cpu_class_by_name() 2017-10-09 23:21:52 -03:00
tilegx tilegx: replace cpu_tilegx_init() with cpu_generic_init() 2017-09-01 11:54:24 -03:00
tricore qom/cpu: move cpu_model null check to cpu_class_by_name() 2017-10-09 23:21:52 -03:00
unicore32 qom/cpu: move cpu_model null check to cpu_class_by_name() 2017-10-09 23:21:52 -03:00
xtensa qom/cpu: move cpu_model null check to cpu_class_by_name() 2017-10-09 23:21:52 -03:00