qemu-e2k/target/mips
James Hogan 6743334568 mips: Improve segment defs for KVM T&E guests
Improve the segment definitions used by get_physical_address() to yield
target_ulong types, e.g. 0xffffffff80000000 instead of 0x80000000. This
is in preparation for enabling emulation of MIPS KVM T&E segments in TCG
MIPS targets, which unlike KVM could potentially have 64-bit
target_ulong. In such a case the offset guest KSEG0 address ends up at
e.g. 0x000000008xxxxxxx instead of 0xffffffff8xxxxxxx.

This also allows the casts to int32_t that force sign extension to be
removed, which removes any confusion due to relational comparison of
unsigned (target_ulong) and signed (int32_t) types.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Yongbok Kim <yongbok.kim@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: kvm@vger.kernel.org
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
2017-08-02 17:01:27 +01:00
..
Makefile.objs
TODO
cpu-qom.h
cpu.c qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
cpu.h target/mips: Add segmentation control registers 2017-07-20 22:42:26 +01:00
dsp_helper.c
gdbstub.c
helper.c mips: Improve segment defs for KVM T&E guests 2017-08-02 17:01:27 +01:00
helper.h target/mips: Add segmentation control registers 2017-07-20 22:42:26 +01:00
kvm.c vcpu_dirty: share the same field in CPUState for all accelerators 2017-07-04 14:30:03 +02:00
kvm_mips.h
lmi_helper.c
machine.c target/mips: Add segmentation control registers 2017-07-20 22:42:26 +01:00
mips-defs.h
mips-semi.c
msa_helper.c
op_helper.c target/mips: Add segmentation control registers 2017-07-20 22:42:26 +01:00
trace-events docs: fix broken paths to docs/devel/tracing.txt 2017-07-31 13:12:53 +03:00
translate.c target-mips: Don't stop on [d]mtc0 DESAVE/KScratch 2017-08-02 17:01:27 +01:00
translate_init.c target/mips: Enable CP0_EBase.WG on MIPS64 CPUs 2017-07-21 03:23:44 +01:00