7c0fa8dff8
This patch provides the building blocks for creating an SR/IOV PCIe Extended Capability header and register/unregister SR/IOV Virtual Functions. Signed-off-by: Knut Omang <knuto@ifi.uio.no> Message-Id: <20220217174504.1051716-2-lukasz.maniak@linux.intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
21 lines
642 B
Meson
21 lines
642 B
Meson
pci_ss = ss.source_set()
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pci_ss.add(files(
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'msi.c',
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'msix.c',
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'pci.c',
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'pci_bridge.c',
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'pci_host.c',
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'pcie_sriov.c',
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'shpc.c',
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'slotid_cap.c'
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))
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# The functions in these modules can be used by devices too. Since we
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# allow plugging PCIe devices into PCI buses, include them even if
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# CONFIG_PCI_EXPRESS=n.
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pci_ss.add(files('pcie.c', 'pcie_aer.c'))
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softmmu_ss.add(when: 'CONFIG_PCI_EXPRESS', if_true: files('pcie_port.c', 'pcie_host.c'))
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softmmu_ss.add_all(when: 'CONFIG_PCI', if_true: pci_ss)
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softmmu_ss.add(when: 'CONFIG_PCI', if_false: files('pci-stub.c'))
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softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('pci-stub.c'))
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