Andreas Färber 67cce5617e target-xtensa: Introduce XtensaCPU subclasses ... Register a CPU type per core registered. Save the XtensaConfig in XtensaCPUClass and copy it from there to CPUXtensaState, to avoid touching every env->config access for now. Prepares for storing per-class GDB register count. Acked-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>		2013-07-26 23:23:17 +02:00
..
core-dc232b	target-xtensa: add dc232b core	2011-10-16 10:40:02 +00:00
core-dc233c	target-xtensa: add dc233c core	2012-04-15 17:43:16 +00:00
core-fsf	target-xtensa: add fsf core	2011-10-16 10:40:16 +00:00
core-dc232b.c	misc: move include files to include/qemu/	2012-12-19 08:32:39 +01:00
core-dc233c.c	misc: move include files to include/qemu/	2012-12-19 08:32:39 +01:00
core-fsf.c	misc: move include files to include/qemu/	2012-12-19 08:32:39 +01:00
cpu-qom.h	target-xtensa: Introduce XtensaCPU subclasses	2013-07-26 23:23:17 +02:00
cpu.c	target-xtensa: Introduce XtensaCPU subclasses	2013-07-26 23:23:17 +02:00
cpu.h	cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()	2013-07-23 02:41:32 +02:00
helper.c	target-xtensa: Introduce XtensaCPU subclasses	2013-07-26 23:23:17 +02:00
helper.h	exec: move include files to include/exec/	2012-12-19 08:31:31 +01:00
Makefile.objs	target-xtensa: Mark as unmigratable	2013-02-01 01:35:21 +01:00
op_helper.c	cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks	2013-06-28 13:25:12 +02:00
overlay_tool.h	target-xtensa: implement MISC SR	2012-12-08 18:48:26 +00:00
translate.c	cpu: Move singlestep_enabled field from CPU_COMMON to CPUState	2013-07-23 02:41:32 +02:00
xtensa-semi.c	exec: Change cpu_memory_rw_debug() argument to CPUState	2013-07-23 02:41:33 +02:00