a7812ae412
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
57 lines
1.5 KiB
C
57 lines
1.5 KiB
C
/* Helpers for instruction counting code generation. */
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static TCGArg *icount_arg;
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static int icount_label;
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static inline void gen_icount_start(void)
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{
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TCGv_i32 count;
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if (!use_icount)
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return;
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icount_label = gen_new_label();
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/* FIXME: This generates lousy code. We can't use tcg_new_temp because
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count needs to live over the conditional branch. To workaround this
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we allow the target to supply a convenient register temporary. */
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#ifndef ICOUNT_TEMP
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count = tcg_temp_local_new_i32();
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#else
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count = ICOUNT_TEMP;
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#endif
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tcg_gen_ld_i32(count, cpu_env, offsetof(CPUState, icount_decr.u32));
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/* This is a horrid hack to allow fixing up the value later. */
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icount_arg = gen_opparam_ptr + 1;
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tcg_gen_subi_i32(count, count, 0xdeadbeef);
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tcg_gen_brcondi_i32(TCG_COND_LT, count, 0, icount_label);
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tcg_gen_st16_i32(count, cpu_env, offsetof(CPUState, icount_decr.u16.low));
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#ifndef ICOUNT_TEMP
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tcg_temp_free_i32(count);
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#endif
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}
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static void gen_icount_end(TranslationBlock *tb, int num_insns)
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{
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if (use_icount) {
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*icount_arg = num_insns;
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gen_set_label(icount_label);
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tcg_gen_exit_tb((long)tb + 2);
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}
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}
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static void inline gen_io_start(void)
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{
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TCGv_i32 tmp = tcg_const_i32(1);
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tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUState, can_do_io));
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tcg_temp_free_i32(tmp);
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}
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static inline void gen_io_end(void)
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{
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TCGv_i32 tmp = tcg_const_i32(0);
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tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUState, can_do_io));
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tcg_temp_free_i32(tmp);
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}
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