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Peter Maydell 6812dfdc6b target/arm: Convert Neon VQSHL, VRSHL, VQRSHL 3-reg-same insns to decodetree 
Convert the VQSHL, VRSHL and VQRSHL insns in the 3-reg-same
group to decodetree. We have already implemented the size==0b11
case of these insns; this commit handles the remaining sizes.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200512163904.10918-8-peter.maydell@linaro.org
2020-05-14 15:03:09 +01:00
..
alpha
x86 and machine queue for 5.0 soft freeze
2020-03-19 14:22:46 +00:00
arm
target/arm: Convert Neon VQSHL, VRSHL, VQRSHL 3-reg-same insns to decodetree
2020-05-14 15:03:09 +01:00
cris
x86 and machine queue for 5.0 soft freeze
2020-03-19 14:22:46 +00:00
hppa
x86 and machine queue for 5.0 soft freeze
2020-03-19 14:22:46 +00:00
i386
target-arm: kvm64: handle SIGBUS signal from kernel or KVM
2020-05-14 15:03:09 +01:00
lm32
x86 and machine queue for 5.0 soft freeze
2020-03-19 14:22:46 +00:00
m68k
target/m68k: fix gdb for m68xxx
2020-05-06 09:29:26 +01:00
microblaze
target/microblaze: Add the pvr-user2 property
2020-04-30 12:11:03 +02:00
mips
target/mips: Fix loongson multimedia condition instructions
2020-03-28 14:09:45 -07:00
moxie
cpu: Use DeviceClass reset instead of a special CPUClass reset
2020-03-17 19:48:10 -04:00
nios2
x86 and machine queue for 5.0 soft freeze
2020-03-19 14:22:46 +00:00
openrisc
x86 and machine queue for 5.0 soft freeze
2020-03-19 14:22:46 +00:00
ppc
ppc patch queue for 2020-04-07
2020-05-07 10:55:12 +01:00
riscv
target/riscv: Add a sifive-e34 cpu type
2020-04-29 13:16:37 -07:00
rx
target/rx/translate: Add missing fall through comment
2020-04-07 18:45:54 -07:00
s390x
target/s390x: Use tcg_gen_gvec_dup_imm
2020-05-06 09:25:00 -07:00
sh4
gdbstub: Introduce gdb_get_float32() to get 32-bit float registers
2020-04-15 11:38:23 +01:00
sparc
x86 and machine queue for 5.0 soft freeze
2020-03-19 14:22:46 +00:00
tilegx
cpu: Use DeviceClass reset instead of a special CPUClass reset
2020-03-17 19:48:10 -04:00
tricore
cpu: Use DeviceClass reset instead of a special CPUClass reset
2020-03-17 19:48:10 -04:00
unicore32
…
xtensa
gdbstub: Do not use memset() on GByteArray
2020-04-15 11:38:23 +01:00