ec7e429bd2
In order to use inclusive terminology, rename SSI 'slave' as 'peripheral', following the specification resolution: https://www.oshwa.org/a-resolution-to-redefine-spi-signal-names/ Patch created mechanically using: $ sed -i s/SSISlave/SSIPeripheral/ $(git grep -l SSISlave) $ sed -i s/SSI_SLAVE/SSI_PERIPHERAL/ $(git grep -l SSI_SLAVE) $ sed -i s/ssi-slave/ssi-peripheral/ $(git grep -l ssi-slave) $ sed -i s/ssi_slave/ssi_peripheral/ $(git grep -l ssi_slave) $ sed -i s/ssi_create_slave/ssi_create_peripheral/ \ $(git grep -l ssi_create_slave) Then in VMStateDescription vmstate_ssi_peripheral we restored the "SSISlave" migration stream name (to avoid breaking migration). Finally the following files have been manually tweaked: - hw/ssi/pl022.c - hw/ssi/xilinx_spips.c Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201012124955.3409127-4-f4bug@amsat.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
389 lines
10 KiB
C
389 lines
10 KiB
C
/*
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* SSD0323 OLED controller with OSRAM Pictiva 128x64 display.
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*
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* Copyright (c) 2006-2007 CodeSourcery.
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* Written by Paul Brook
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*
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* This code is licensed under the GPL.
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*/
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/* The controller can support a variety of different displays, but we only
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implement one. Most of the commends relating to brightness and geometry
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setup are ignored. */
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#include "qemu/osdep.h"
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#include "hw/ssi/ssi.h"
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#include "migration/vmstate.h"
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#include "qemu/module.h"
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#include "ui/console.h"
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#include "qom/object.h"
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//#define DEBUG_SSD0323 1
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#ifdef DEBUG_SSD0323
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#define DPRINTF(fmt, ...) \
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do { printf("ssd0323: " fmt , ## __VA_ARGS__); } while (0)
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#define BADF(fmt, ...) \
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do { \
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fprintf(stderr, "ssd0323: error: " fmt , ## __VA_ARGS__); abort(); \
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} while (0)
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#else
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#define DPRINTF(fmt, ...) do {} while(0)
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#define BADF(fmt, ...) \
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do { fprintf(stderr, "ssd0323: error: " fmt , ## __VA_ARGS__);} while (0)
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#endif
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/* Scaling factor for pixels. */
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#define MAGNIFY 4
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#define REMAP_SWAP_COLUMN 0x01
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#define REMAP_SWAP_NYBBLE 0x02
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#define REMAP_VERTICAL 0x04
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#define REMAP_SWAP_COM 0x10
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#define REMAP_SPLIT_COM 0x40
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enum ssd0323_mode
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{
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SSD0323_CMD,
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SSD0323_DATA
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};
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struct ssd0323_state {
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SSIPeripheral ssidev;
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QemuConsole *con;
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uint32_t cmd_len;
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int32_t cmd;
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int32_t cmd_data[8];
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int32_t row;
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int32_t row_start;
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int32_t row_end;
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int32_t col;
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int32_t col_start;
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int32_t col_end;
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int32_t redraw;
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int32_t remap;
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uint32_t mode;
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uint8_t framebuffer[128 * 80 / 2];
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};
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#define TYPE_SSD0323 "ssd0323"
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OBJECT_DECLARE_SIMPLE_TYPE(ssd0323_state, SSD0323)
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static uint32_t ssd0323_transfer(SSIPeripheral *dev, uint32_t data)
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{
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ssd0323_state *s = SSD0323(dev);
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switch (s->mode) {
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case SSD0323_DATA:
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DPRINTF("data 0x%02x\n", data);
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s->framebuffer[s->col + s->row * 64] = data;
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if (s->remap & REMAP_VERTICAL) {
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s->row++;
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if (s->row > s->row_end) {
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s->row = s->row_start;
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s->col++;
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}
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if (s->col > s->col_end) {
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s->col = s->col_start;
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}
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} else {
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s->col++;
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if (s->col > s->col_end) {
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s->row++;
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s->col = s->col_start;
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}
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if (s->row > s->row_end) {
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s->row = s->row_start;
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}
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}
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s->redraw = 1;
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break;
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case SSD0323_CMD:
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DPRINTF("cmd 0x%02x\n", data);
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if (s->cmd_len == 0) {
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s->cmd = data;
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} else {
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s->cmd_data[s->cmd_len - 1] = data;
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}
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s->cmd_len++;
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switch (s->cmd) {
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#define DATA(x) if (s->cmd_len <= (x)) return 0
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case 0x15: /* Set column. */
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DATA(2);
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s->col = s->col_start = s->cmd_data[0] % 64;
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s->col_end = s->cmd_data[1] % 64;
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break;
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case 0x75: /* Set row. */
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DATA(2);
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s->row = s->row_start = s->cmd_data[0] % 80;
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s->row_end = s->cmd_data[1] % 80;
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break;
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case 0x81: /* Set contrast */
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DATA(1);
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break;
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case 0x84: case 0x85: case 0x86: /* Max current. */
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DATA(0);
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break;
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case 0xa0: /* Set remapping. */
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/* FIXME: Implement this. */
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DATA(1);
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s->remap = s->cmd_data[0];
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break;
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case 0xa1: /* Set display start line. */
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case 0xa2: /* Set display offset. */
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/* FIXME: Implement these. */
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DATA(1);
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break;
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case 0xa4: /* Normal mode. */
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case 0xa5: /* All on. */
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case 0xa6: /* All off. */
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case 0xa7: /* Inverse. */
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/* FIXME: Implement these. */
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DATA(0);
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break;
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case 0xa8: /* Set multiplex ratio. */
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case 0xad: /* Set DC-DC converter. */
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DATA(1);
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/* Ignored. Don't care. */
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break;
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case 0xae: /* Display off. */
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case 0xaf: /* Display on. */
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DATA(0);
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/* TODO: Implement power control. */
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break;
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case 0xb1: /* Set phase length. */
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case 0xb2: /* Set row period. */
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case 0xb3: /* Set clock rate. */
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case 0xbc: /* Set precharge. */
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case 0xbe: /* Set VCOMH. */
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case 0xbf: /* Set segment low. */
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DATA(1);
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/* Ignored. Don't care. */
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break;
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case 0xb8: /* Set grey scale table. */
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/* FIXME: Implement this. */
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DATA(8);
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break;
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case 0xe3: /* NOP. */
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DATA(0);
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break;
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case 0xff: /* Nasty hack because we don't handle chip selects
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properly. */
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break;
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default:
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BADF("Unknown command: 0x%x\n", data);
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}
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s->cmd_len = 0;
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return 0;
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}
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return 0;
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}
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static void ssd0323_update_display(void *opaque)
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{
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ssd0323_state *s = (ssd0323_state *)opaque;
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DisplaySurface *surface = qemu_console_surface(s->con);
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uint8_t *dest;
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uint8_t *src;
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int x;
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int y;
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int i;
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int line;
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char *colors[16];
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char colortab[MAGNIFY * 64];
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char *p;
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int dest_width;
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if (!s->redraw)
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return;
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switch (surface_bits_per_pixel(surface)) {
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case 0:
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return;
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case 15:
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dest_width = 2;
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break;
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case 16:
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dest_width = 2;
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break;
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case 24:
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dest_width = 3;
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break;
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case 32:
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dest_width = 4;
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break;
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default:
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BADF("Bad color depth\n");
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return;
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}
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p = colortab;
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for (i = 0; i < 16; i++) {
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int n;
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colors[i] = p;
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switch (surface_bits_per_pixel(surface)) {
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case 15:
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n = i * 2 + (i >> 3);
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p[0] = n | (n << 5);
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p[1] = (n << 2) | (n >> 3);
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break;
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case 16:
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n = i * 2 + (i >> 3);
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p[0] = n | (n << 6) | ((n << 1) & 0x20);
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p[1] = (n << 3) | (n >> 2);
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break;
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case 24:
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case 32:
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n = (i << 4) | i;
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p[0] = p[1] = p[2] = n;
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break;
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default:
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BADF("Bad color depth\n");
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return;
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}
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p += dest_width;
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}
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/* TODO: Implement row/column remapping. */
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dest = surface_data(surface);
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for (y = 0; y < 64; y++) {
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line = y;
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src = s->framebuffer + 64 * line;
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for (x = 0; x < 64; x++) {
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int val;
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val = *src >> 4;
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for (i = 0; i < MAGNIFY; i++) {
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memcpy(dest, colors[val], dest_width);
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dest += dest_width;
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}
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val = *src & 0xf;
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for (i = 0; i < MAGNIFY; i++) {
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memcpy(dest, colors[val], dest_width);
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dest += dest_width;
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}
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src++;
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}
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for (i = 1; i < MAGNIFY; i++) {
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memcpy(dest, dest - dest_width * MAGNIFY * 128,
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dest_width * 128 * MAGNIFY);
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dest += dest_width * 128 * MAGNIFY;
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}
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}
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s->redraw = 0;
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dpy_gfx_update(s->con, 0, 0, 128 * MAGNIFY, 64 * MAGNIFY);
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}
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static void ssd0323_invalidate_display(void * opaque)
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{
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ssd0323_state *s = (ssd0323_state *)opaque;
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s->redraw = 1;
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}
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/* Command/data input. */
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static void ssd0323_cd(void *opaque, int n, int level)
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{
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ssd0323_state *s = (ssd0323_state *)opaque;
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DPRINTF("%s mode\n", level ? "Data" : "Command");
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s->mode = level ? SSD0323_DATA : SSD0323_CMD;
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}
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static int ssd0323_post_load(void *opaque, int version_id)
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{
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ssd0323_state *s = (ssd0323_state *)opaque;
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if (s->cmd_len > ARRAY_SIZE(s->cmd_data)) {
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return -EINVAL;
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}
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if (s->row < 0 || s->row >= 80) {
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return -EINVAL;
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}
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if (s->row_start < 0 || s->row_start >= 80) {
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return -EINVAL;
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}
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if (s->row_end < 0 || s->row_end >= 80) {
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return -EINVAL;
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}
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if (s->col < 0 || s->col >= 64) {
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return -EINVAL;
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}
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if (s->col_start < 0 || s->col_start >= 64) {
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return -EINVAL;
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}
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if (s->col_end < 0 || s->col_end >= 64) {
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return -EINVAL;
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}
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if (s->mode != SSD0323_CMD && s->mode != SSD0323_DATA) {
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return -EINVAL;
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}
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return 0;
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}
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static const VMStateDescription vmstate_ssd0323 = {
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.name = "ssd0323_oled",
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.version_id = 2,
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.minimum_version_id = 2,
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.post_load = ssd0323_post_load,
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.fields = (VMStateField []) {
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VMSTATE_UINT32(cmd_len, ssd0323_state),
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VMSTATE_INT32(cmd, ssd0323_state),
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VMSTATE_INT32_ARRAY(cmd_data, ssd0323_state, 8),
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VMSTATE_INT32(row, ssd0323_state),
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VMSTATE_INT32(row_start, ssd0323_state),
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VMSTATE_INT32(row_end, ssd0323_state),
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VMSTATE_INT32(col, ssd0323_state),
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VMSTATE_INT32(col_start, ssd0323_state),
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VMSTATE_INT32(col_end, ssd0323_state),
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VMSTATE_INT32(redraw, ssd0323_state),
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VMSTATE_INT32(remap, ssd0323_state),
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VMSTATE_UINT32(mode, ssd0323_state),
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VMSTATE_BUFFER(framebuffer, ssd0323_state),
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VMSTATE_SSI_PERIPHERAL(ssidev, ssd0323_state),
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VMSTATE_END_OF_LIST()
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}
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};
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static const GraphicHwOps ssd0323_ops = {
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.invalidate = ssd0323_invalidate_display,
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.gfx_update = ssd0323_update_display,
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};
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static void ssd0323_realize(SSIPeripheral *d, Error **errp)
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{
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DeviceState *dev = DEVICE(d);
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ssd0323_state *s = SSD0323(d);
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s->col_end = 63;
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s->row_end = 79;
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s->con = graphic_console_init(dev, 0, &ssd0323_ops, s);
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qemu_console_resize(s->con, 128 * MAGNIFY, 64 * MAGNIFY);
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qdev_init_gpio_in(dev, ssd0323_cd, 1);
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}
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static void ssd0323_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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SSIPeripheralClass *k = SSI_PERIPHERAL_CLASS(klass);
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k->realize = ssd0323_realize;
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k->transfer = ssd0323_transfer;
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k->cs_polarity = SSI_CS_HIGH;
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dc->vmsd = &vmstate_ssd0323;
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set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
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}
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static const TypeInfo ssd0323_info = {
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.name = TYPE_SSD0323,
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.parent = TYPE_SSI_PERIPHERAL,
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.instance_size = sizeof(ssd0323_state),
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.class_init = ssd0323_class_init,
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};
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static void ssd03232_register_types(void)
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{
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type_register_static(&ssd0323_info);
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}
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type_init(ssd03232_register_types)
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