58f3e3fe69
It's an adc, put it where it belongs. Cc: Andrzej Zaborowski <balrogg@gmail.com> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: qemu-arm@nongnu.org Signed-off-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
57 lines
1.4 KiB
C
57 lines
1.4 KiB
C
/*
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* Maxim MAX1110/1111 ADC chip emulation.
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*
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* Copyright (c) 2006 Openedhand Ltd.
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* Written by Andrzej Zaborowski <balrog@zabor.org>
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*
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* This code is licensed under the GNU GPLv2.
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*
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* Contributions after 2012-01-13 are licensed under the terms of the
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* GNU GPL, version 2 or (at your option) any later version.
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*/
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#ifndef HW_MISC_MAX111X_H
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#define HW_MISC_MAX111X_H
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#include "hw/ssi/ssi.h"
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#include "qom/object.h"
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/*
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* This is a model of the Maxim MAX1110/1111 ADC chip, which for QEMU
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* is an SSI slave device. It has either 4 (max1110) or 8 (max1111)
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* 8-bit ADC channels.
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*
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* QEMU interface:
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* + GPIO inputs 0..3 (for max1110) or 0..7 (for max1111): set the value
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* of each ADC input, as an unsigned 8-bit value
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* + GPIO output 0: interrupt line
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* + Properties "input0" to "input3" (max1110) or "input0" to "input7"
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* (max1111): initial reset values for ADC inputs.
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*
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* Known bugs:
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* + the interrupt line is not correctly implemented, and will never
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* be lowered once it has been asserted.
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*/
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struct MAX111xState {
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SSIPeripheral parent_obj;
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qemu_irq interrupt;
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/* Values of inputs at system reset (settable by QOM property) */
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uint8_t reset_input[8];
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uint8_t tb1, rb2, rb3;
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int cycle;
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uint8_t input[8];
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int inputs, com;
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};
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#define TYPE_MAX_111X "max111x"
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OBJECT_DECLARE_SIMPLE_TYPE(MAX111xState, MAX_111X)
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#define TYPE_MAX_1110 "max1110"
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#define TYPE_MAX_1111 "max1111"
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#endif
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