qemu-e2k/target/i386
Daniel P. Berrangé 69e3895f9d target/i386: add missing bits to CR4_RESERVED_MASK
Booting Fedora kernels with -cpu max hangs very early in boot. Disabling
the la57 CPUID bit fixes the problem. git bisect traced the regression to

  commit 213ff024a2 (HEAD, refs/bisect/bad)
  Author: Lara Lazier <laramglazier@gmail.com>
  Date:   Wed Jul 21 17:26:50 2021 +0200

    target/i386: Added consistency checks for CR4

    All MBZ bits in CR4 must be zero. (APM2 15.5)
    Added reserved bitmask and added checks in both
    helper_vmrun and helper_write_crN.

    Signed-off-by: Lara Lazier <laramglazier@gmail.com>
    Message-Id: <20210721152651.14683-2-laramglazier@gmail.com>
    Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

In this commit CR4_RESERVED_MASK is missing CR4_LA57_MASK and
two others. Adding this lets Fedora kernels boot once again.

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Tested-by: Richard W.M. Jones <rjones@redhat.com>
Message-Id: <20210831175033.175584-1-berrange@redhat.com>
[Removed VMXE/SMXE, matching the commit message. - Paolo]
Fixes: 213ff024a2 ("target/i386: Added consistency checks for CR4", 2021-07-22)
Cc: qemu-stable@nongnu.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-09-13 13:56:18 +02:00
..
hax numa: Teach ram block notifiers about resizeable ram blocks 2021-05-13 18:21:13 +01:00
hvf target/i386: Populate x86_ext_save_areas offsets using cpuid where possible 2021-07-06 08:33:48 +02:00
kvm migration: Unify failure check for migrate_add_blocker() 2021-08-26 17:15:28 +02:00
nvmm migration: Unify failure check for migrate_add_blocker() 2021-08-26 17:15:28 +02:00
tcg target/i386: Fixed size of constant for Windows 2021-08-13 14:31:49 +02:00
whpx migration: Unify failure check for migrate_add_blocker() 2021-08-26 17:15:28 +02:00
arch_dump.c
arch_memory_mapping.c
cpu-dump.c i386/cpu_dump: support AVX512 ZMM regs dump 2021-05-31 15:53:03 -04:00
cpu-internal.h i386: split off sysemu part of cpu.c 2021-05-10 15:41:52 -04:00
cpu-param.h
cpu-qom.h qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros 2020-09-18 14:12:32 -04:00
cpu-sysemu.c i386: drop FEAT_HYPERV feature leaves 2021-05-31 15:53:03 -04:00
cpu.c i386/cpu: Remove AVX_VNNI feature from Cooperlake cpu model 2021-08-25 12:36:49 -04:00
cpu.h target/i386: add missing bits to CR4_RESERVED_MASK 2021-09-13 13:56:18 +02:00
gdbstub.c target/i386: gdbstub: only write CR0/CR2/CR3/EFER for sysemu 2021-05-10 15:41:52 -04:00
helper.c i386: make cpu_load_efer sysemu-only 2021-05-10 15:41:52 -04:00
helper.h target/i386: fix exceptions for MOV to DR 2021-07-09 18:21:34 +02:00
host-cpu.c i386: do not call cpudef-only models functions for max, host, base 2021-07-23 15:47:13 +02:00
host-cpu.h accel-cpu: make cpu_realizefn return a bool 2021-05-10 15:41:50 -04:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
machine.c vmstate: Constify some VMStateDescriptions 2021-05-02 17:24:50 +02:00
meson.build i386: split off sysemu part of cpu.c 2021-05-10 15:41:52 -04:00
monitor.c target/i386/sev: add support to query the attestation report 2021-06-01 09:32:23 -04:00
ops_sse_header.h tcg: Combine dh_is_64bit and dh_is_signed to dh_typecode 2021-06-19 08:51:11 -07:00
ops_sse.h x86 tcg cpus: Fix Lesser GPL version number 2020-11-15 16:41:42 +01:00
sev_i386.h target/i386/sev: add support to query the attestation report 2021-06-01 09:32:23 -04:00
sev-stub.c target/i386/sev: add support to query the attestation report 2021-06-01 09:32:23 -04:00
sev.c error: Use error_fatal to simplify obvious fatal errors (again) 2021-08-26 17:15:28 +02:00
shift_helper_template.h x86 tcg cpus: Fix Lesser GPL version number 2020-11-15 16:41:42 +01:00
svm.h target/i386: fix exceptions for MOV to DR 2021-07-09 18:21:34 +02:00
trace-events * Update the references to some doc files (use *.rst instead of *.txt) 2021-06-02 17:08:11 +01:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
xsave_helper.c target/i386: Observe XSAVE state area offsets 2021-07-06 07:54:53 +02:00