8b453a2b2b
Read the instruction memory Create a packet data structure Generate TCG code for the start of the packet Invoke the generate function for each instruction Generate TCG code for the end of the packet Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <1612763186-18161-30-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
94 lines
2.7 KiB
C
94 lines
2.7 KiB
C
/*
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* Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef HEXAGON_TRANSLATE_H
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#define HEXAGON_TRANSLATE_H
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#include "qemu/bitmap.h"
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#include "cpu.h"
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#include "exec/translator.h"
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#include "tcg/tcg-op.h"
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#include "internal.h"
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typedef struct DisasContext {
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DisasContextBase base;
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uint32_t mem_idx;
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uint32_t num_packets;
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uint32_t num_insns;
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int reg_log[REG_WRITES_MAX];
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int reg_log_idx;
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DECLARE_BITMAP(regs_written, TOTAL_PER_THREAD_REGS);
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int preg_log[PRED_WRITES_MAX];
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int preg_log_idx;
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uint8_t store_width[STORES_MAX];
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uint8_t s1_store_processed;
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} DisasContext;
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static inline void ctx_log_reg_write(DisasContext *ctx, int rnum)
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{
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#if HEX_DEBUG
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if (test_bit(rnum, ctx->regs_written)) {
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HEX_DEBUG_LOG("WARNING: Multiple writes to r%d\n", rnum);
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}
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#endif
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ctx->reg_log[ctx->reg_log_idx] = rnum;
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ctx->reg_log_idx++;
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set_bit(rnum, ctx->regs_written);
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}
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static inline void ctx_log_reg_write_pair(DisasContext *ctx, int rnum)
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{
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ctx_log_reg_write(ctx, rnum);
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ctx_log_reg_write(ctx, rnum + 1);
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}
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static inline void ctx_log_pred_write(DisasContext *ctx, int pnum)
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{
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ctx->preg_log[ctx->preg_log_idx] = pnum;
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ctx->preg_log_idx++;
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}
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static inline bool is_preloaded(DisasContext *ctx, int num)
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{
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return test_bit(num, ctx->regs_written);
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}
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extern TCGv hex_gpr[TOTAL_PER_THREAD_REGS];
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extern TCGv hex_pred[NUM_PREGS];
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extern TCGv hex_next_PC;
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extern TCGv hex_this_PC;
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extern TCGv hex_slot_cancelled;
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extern TCGv hex_branch_taken;
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extern TCGv hex_new_value[TOTAL_PER_THREAD_REGS];
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extern TCGv hex_reg_written[TOTAL_PER_THREAD_REGS];
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extern TCGv hex_new_pred_value[NUM_PREGS];
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extern TCGv hex_pred_written;
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extern TCGv hex_store_addr[STORES_MAX];
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extern TCGv hex_store_width[STORES_MAX];
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extern TCGv hex_store_val32[STORES_MAX];
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extern TCGv_i64 hex_store_val64[STORES_MAX];
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extern TCGv hex_dczero_addr;
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extern TCGv hex_llsc_addr;
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extern TCGv hex_llsc_val;
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extern TCGv_i64 hex_llsc_val_i64;
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void gen_exception(int excp);
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void gen_exception_debug(void);
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void process_store(DisasContext *ctx, Packet *pkt, int slot_num);
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#endif
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