74 lines
1.8 KiB
C
74 lines
1.8 KiB
C
#ifndef QEMU_PCI_BUS_H
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#define QEMU_PCI_BUS_H
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#include "hw/pci/pci.h"
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/*
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* PCI Bus datastructures.
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*
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* Do not access the following members directly;
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* use accessor functions in pci.h
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*/
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struct PCIBusClass {
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/*< private >*/
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BusClass parent_class;
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/*< public >*/
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int (*bus_num)(PCIBus *bus);
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uint16_t (*numa_node)(PCIBus *bus);
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};
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enum PCIBusFlags {
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/* This bus is the root of a PCI domain */
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PCI_BUS_IS_ROOT = 0x0001,
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/* PCIe extended configuration space is accessible on this bus */
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PCI_BUS_EXTENDED_CONFIG_SPACE = 0x0002,
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/* This is a CXL Type BUS */
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PCI_BUS_CXL = 0x0004,
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};
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struct PCIBus {
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BusState qbus;
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enum PCIBusFlags flags;
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PCIIOMMUFunc iommu_fn;
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void *iommu_opaque;
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uint8_t devfn_min;
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uint32_t slot_reserved_mask;
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pci_set_irq_fn set_irq;
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pci_map_irq_fn map_irq;
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pci_route_irq_fn route_intx_to_irq;
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void *irq_opaque;
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PCIDevice *devices[PCI_SLOT_MAX * PCI_FUNC_MAX];
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PCIDevice *parent_dev;
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MemoryRegion *address_space_mem;
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MemoryRegion *address_space_io;
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QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */
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QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */
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/* The bus IRQ state is the logical OR of the connected devices.
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Keep a count of the number of devices with raised IRQs. */
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int nirq;
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int *irq_count;
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Notifier machine_done;
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};
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static inline bool pci_bus_is_cxl(PCIBus *bus)
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{
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return !!(bus->flags & PCI_BUS_CXL);
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}
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static inline bool pci_bus_is_root(PCIBus *bus)
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{
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return !!(bus->flags & PCI_BUS_IS_ROOT);
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}
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static inline bool pci_bus_allows_extended_config_space(PCIBus *bus)
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{
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return !!(bus->flags & PCI_BUS_EXTENDED_CONFIG_SPACE);
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}
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#endif /* QEMU_PCI_BUS_H */
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