Conor Dooley 95e401d378 hw/riscv: virt: fix the plic's address cells ... When optional AIA PLIC support was added the to the virt machine, the address cells property was removed leading the issues with dt-validate on a dump from the virt machine: /stuff/qemu/qemu.dtb: plic@c000000: '#address-cells' is a required property From schema: /stuff/linux/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml Add back the property to suppress the warning. Reported-by: Rob Herring <robh@kernel.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Message-id: 20220810184612.157317-3-mail@conchuod.ie Link: https://lore.kernel.org/linux-riscv/20220803170552.GA2250266-robh@kernel.org/ Fixes: e6faee6585 ("hw/riscv: virt: Add optional AIA APLIC support to virt machine") Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2022-09-07 09:18:33 +02:00
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boot_opensbi.h	Clean up header guards that don't match their file name	2022-05-11 16:49:06 +02:00
boot.h	hw/riscv: remove 'fdt' param from riscv_setup_rom_reset_vec()	2022-09-07 09:18:33 +02:00
microchip_pfsoc.h	hw/riscv: microchip_pfsoc: fix kernel panics due to missing peripherals	2022-09-07 09:18:33 +02:00
numa.h
opentitan.h	hw/riscv: opentitan: bump opentitan version	2022-09-07 09:18:33 +02:00
riscv_hart.h
shakti_c.h	Clean up header guards that don't match their file name	2022-05-11 16:49:06 +02:00
sifive_cpu.h
sifive_e.h
sifive_u.h	hw/riscv: sifive_u: Use the PLIC config helper function	2021-10-28 14:39:23 +10:00
spike.h	hw/riscv: spike: Allow using binary firmware as bios	2022-01-21 15:52:56 +10:00
virt.h	hw/riscv: virt: fix the plic's address cells	2022-09-07 09:18:33 +02:00