e662449aa6
The CNT register is a read-only register. There is no need to store it's value, it can be calculated on demand. The calculated frequency is needed temporarily only. Note that this is a migration compatibility break for all boards types that use the EPIT peripheral. Signed-off-by: Axel Heider <axel.heider@hensoldt.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
82 lines
2.3 KiB
C
82 lines
2.3 KiB
C
/*
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* i.MX EPIT Timer
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*
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* Copyright (c) 2008 OK Labs
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* Copyright (c) 2011 NICTA Pty Ltd
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* Originally written by Hans Jiang
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* Updated by Peter Chubb
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* Updated by Jean-Christophe Dubois <jcd@tribudubois.net>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef IMX_EPIT_H
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#define IMX_EPIT_H
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#include "hw/sysbus.h"
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#include "hw/ptimer.h"
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#include "hw/misc/imx_ccm.h"
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#include "qom/object.h"
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/*
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* EPIT: Enhanced periodic interrupt timer
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*/
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#define CR_EN (1 << 0)
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#define CR_ENMOD (1 << 1)
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#define CR_OCIEN (1 << 2)
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#define CR_RLD (1 << 3)
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#define CR_PRESCALE_SHIFT (4)
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#define CR_PRESCALE_BITS (12)
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#define CR_SWR (1 << 16)
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#define CR_IOVW (1 << 17)
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#define CR_DBGEN (1 << 18)
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#define CR_WAITEN (1 << 19)
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#define CR_DOZEN (1 << 20)
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#define CR_STOPEN (1 << 21)
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#define CR_CLKSRC_SHIFT (24)
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#define CR_CLKSRC_BITS (2)
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#define SR_OCIF (1 << 0)
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#define EPIT_TIMER_MAX 0XFFFFFFFFUL
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#define TYPE_IMX_EPIT "imx.epit"
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OBJECT_DECLARE_SIMPLE_TYPE(IMXEPITState, IMX_EPIT)
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struct IMXEPITState {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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ptimer_state *timer_reload;
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ptimer_state *timer_cmp;
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MemoryRegion iomem;
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IMXCCMState *ccm;
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uint32_t cr;
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uint32_t sr;
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uint32_t lr;
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uint32_t cmp;
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qemu_irq irq;
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};
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#endif /* IMX_EPIT_H */
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