Greg Kurz 6d38666a89 ppc: Ignore the CPU_INTERRUPT_EXITTB interrupt with KVM ...

This only makes sense with an emulated CPU. Don't set the bit in
CPUState::interrupt_request when using KVM to avoid confusions.

Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <157548863423.3650476.16424649423510075159.stgit@bahia.lan>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

2019-12-17 10:39:48 +11:00

..

alpha

target/alpha: fetch code with translator_ld

2019-10-28 15:12:38 +00:00

arm

target/arm: ensure we use current exception state after SCR update

2019-12-16 10:52:58 +00:00

cris

cputlb: ensure _cmmu helper functions follow the naming standard

2019-10-28 15:12:38 +00:00

hppa

target/hppa: fetch code with translator_ld

2019-10-28 15:12:38 +00:00

i386

target/i386: disable VMX features if nested=0

2019-12-06 12:35:40 +01:00

lm32

…

m68k

target/m68k: fetch code with translator_ld

2019-10-28 15:12:38 +00:00

microblaze

target/microblaze: Plug temp leak around eval_cond_jmp()

2019-11-12 16:35:26 +01:00

mips

target/mips: Refactor handling of vector compare 'less than' (signed) instructions

2019-10-25 18:37:01 +02:00

moxie

…

nios2

…

openrisc

target/openrisc: fetch code with translator_ld

2019-10-28 15:12:38 +00:00

ppc

ppc: Ignore the CPU_INTERRUPT_EXITTB interrupt with KVM

2019-12-17 10:39:48 +11:00

riscv

target/riscv: Remove atomic accesses to MIP CSR

2019-11-14 09:53:28 -08:00

s390x

s390x/tcg: clear local interrupts on reset normal

2019-12-14 10:25:50 +01:00

sh4

target/sh4: fetch code with translator_ld

2019-10-28 15:12:38 +00:00

sparc

target/sparc: Define an enumeration for accessing env->regwptr

2019-11-06 13:35:25 +01:00

tilegx

tcg: TCGMemOp is now accelerator independent MemOp

2019-09-03 08:30:38 -07:00

tricore

tcg: TCGMemOp is now accelerator independent MemOp

2019-09-03 08:30:38 -07:00

unicore32

…

xtensa

target/xtensa: fetch code with translator_ld

2019-10-28 15:12:38 +00:00