6d9412ea81
This adds basic support for the "compat" CPU option. By specifying the compat property, the user can manually switch guest CPU mode from "raw" to "architected". This defines feature disable bits which are not used yet as, for example, PowerISA 2.07 says if 2.06 mode is selected, the TM bit does not matter - transactional memory (TM) will be disabled because 2.06 does not define it at all. The same is true for VSX and 2.05 mode. So just setting a mode must be ok. This does not change the existing behavior as the actual compatibility mode support is coming in next patches. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> [agraf: fix compilation on 32bit hosts] Signed-off-by: Alexander Graf <agraf@suse.de> |
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.. | ||
e500-ccsr.h | ||
e500.c | ||
e500.h | ||
e500plat.c | ||
mac_newworld.c | ||
mac_oldworld.c | ||
mac.h | ||
Makefile.objs | ||
mpc8544_guts.c | ||
mpc8544ds.c | ||
ppc4xx_devs.c | ||
ppc4xx_pci.c | ||
ppc405_boards.c | ||
ppc405_uc.c | ||
ppc405.h | ||
ppc440_bamboo.c | ||
ppc_booke.c | ||
ppc.c | ||
ppce500_spin.c | ||
prep.c | ||
spapr_events.c | ||
spapr_hcall.c | ||
spapr_iommu.c | ||
spapr_pci.c | ||
spapr_rtas.c | ||
spapr_vio.c | ||
spapr.c | ||
virtex_ml507.c |