d279279e2b
From MIPS documentation (Volume III): UserLocal Register (CP0 Register 4, Select 2) Compliance Level: Recommended. The UserLocal register is a read-write register that is not interpreted by the hardware and conditionally readable via the RDHWR instruction. This register only exists if the Config3-ULRI register field is set. Privileged software may write this register with arbitrary information and make it accessible to unprivileged software via register 29 (ULR) of the RDHWR instruction. To do so, bit 29 of the HWREna register must be set to a 1 to enable unprivileged access to the register. Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
37 lines
1.1 KiB
C
37 lines
1.1 KiB
C
/*
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* MIPS specific CPU ABI and functions for linux-user
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*
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* Copyright (c) 2004-2005 Jocelyn Mayer
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef TARGET_CPU_H
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#define TARGET_CPU_H
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static inline void cpu_clone_regs(CPUMIPSState *env, target_ulong newsp)
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{
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if (newsp) {
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env->active_tc.gpr[29] = newsp;
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}
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env->active_tc.gpr[7] = 0;
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env->active_tc.gpr[2] = 0;
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}
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static inline void cpu_set_tls(CPUMIPSState *env, target_ulong newtls)
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{
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env->active_tc.CP0_UserLocal = newtls;
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}
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#endif
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