6ee45fac56
Enforce the style described by commit 067109a11c
("docs/devel:
mention the spacing requirement for QOM"):
The first declaration of a storage or class structure should
always be the parent and leave a visual space between that
declaration and the new code. It is also useful to separate
backing for properties (options driven by the user) and internal
state to make navigation easier.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20231013140116.255-2-philmd@linaro.org>
73 lines
2.1 KiB
C
73 lines
2.1 KiB
C
/*
|
|
* QEMU x86 CPU
|
|
*
|
|
* Copyright (c) 2012 SUSE LINUX Products GmbH
|
|
*
|
|
* This library is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU Lesser General Public
|
|
* License as published by the Free Software Foundation; either
|
|
* version 2.1 of the License, or (at your option) any later version.
|
|
*
|
|
* This library is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
* Lesser General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU Lesser General Public
|
|
* License along with this library; if not, see
|
|
* <http://www.gnu.org/licenses/lgpl-2.1.html>
|
|
*/
|
|
#ifndef QEMU_I386_CPU_QOM_H
|
|
#define QEMU_I386_CPU_QOM_H
|
|
|
|
#include "hw/core/cpu.h"
|
|
#include "qemu/notify.h"
|
|
#include "qom/object.h"
|
|
|
|
#ifdef TARGET_X86_64
|
|
#define TYPE_X86_CPU "x86_64-cpu"
|
|
#else
|
|
#define TYPE_X86_CPU "i386-cpu"
|
|
#endif
|
|
|
|
OBJECT_DECLARE_CPU_TYPE(X86CPU, X86CPUClass, X86_CPU)
|
|
|
|
typedef struct X86CPUModel X86CPUModel;
|
|
|
|
/**
|
|
* X86CPUClass:
|
|
* @cpu_def: CPU model definition
|
|
* @host_cpuid_required: Whether CPU model requires cpuid from host.
|
|
* @ordering: Ordering on the "-cpu help" CPU model list.
|
|
* @migration_safe: See CpuDefinitionInfo::migration_safe
|
|
* @static_model: See CpuDefinitionInfo::static
|
|
* @parent_realize: The parent class' realize handler.
|
|
* @parent_phases: The parent class' reset phase handlers.
|
|
*
|
|
* An x86 CPU model or family.
|
|
*/
|
|
struct X86CPUClass {
|
|
CPUClass parent_class;
|
|
|
|
/* CPU definition, automatically loaded by instance_init if not NULL.
|
|
* Should be eventually replaced by subclass-specific property defaults.
|
|
*/
|
|
X86CPUModel *model;
|
|
|
|
bool host_cpuid_required;
|
|
int ordering;
|
|
bool migration_safe;
|
|
bool static_model;
|
|
|
|
/* Optional description of CPU model.
|
|
* If unavailable, cpu_def->model_id is used */
|
|
const char *model_description;
|
|
|
|
DeviceRealize parent_realize;
|
|
DeviceUnrealize parent_unrealize;
|
|
ResettablePhases parent_phases;
|
|
};
|
|
|
|
|
|
#endif
|