OpenE2K
/
qemu-e2k
13
4
Fork 0
Code Issues 4 Pull Requests Projects 2 Releases Activity
qemu-e2k/tests/tcg/riscv64
History
Richard Henderson b97028b8c5 target/riscv: Set env->bins in gen_exception_illegal 
While we set env->bins when unwinding for ILLEGAL_INST,
from e.g. csrrw, we weren't setting it for immediately
illegal instructions.

Add a testcase for mtval via both exception paths.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1060
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220604231004.49990-2-richard.henderson@linaro.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
 		2022-07-03 10:03:20 +10:00
..
Makefile.softmmu-target target/riscv: Set env->bins in gen_exception_illegal 2022-07-03 10:03:20 +10:00
Makefile.target
…
issue1060.S target/riscv: Set env->bins in gen_exception_illegal 2022-07-03 10:03:20 +10:00
semicall.h
…
semihost.ld target/riscv: Set env->bins in gen_exception_illegal 2022-07-03 10:03:20 +10:00
test-div.c
…