f045a0104c
As usual block all vfio-pci devices from being migrated, but make an exception for failover primary devices. This is achieved by setting unmigratable to 0 but also add a migration blocker for all vfio-pci devices except failover primary devices. These will be unplugged before migration happens by the migration handler of the corresponding virtio-net standby device. Signed-off-by: Jens Freimann <jfreimann@redhat.com> Acked-by: Alex Williamson <alex.williamson@redhat.com> Message-Id: <20191029114905.6856-12-jfreimann@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
207 lines
6.3 KiB
C
207 lines
6.3 KiB
C
/*
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* vfio based device assignment support - PCI devices
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*
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* Copyright Red Hat, Inc. 2012-2015
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*
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* Authors:
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* Alex Williamson <alex.williamson@redhat.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2. See
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* the COPYING file in the top-level directory.
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*/
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#ifndef HW_VFIO_VFIO_PCI_H
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#define HW_VFIO_VFIO_PCI_H
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#include "exec/memory.h"
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#include "hw/pci/pci.h"
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#include "hw/vfio/vfio-common.h"
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#include "qemu/event_notifier.h"
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#include "qemu/queue.h"
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#include "qemu/timer.h"
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#define PCI_ANY_ID (~0)
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struct VFIOPCIDevice;
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typedef struct VFIOIOEventFD {
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QLIST_ENTRY(VFIOIOEventFD) next;
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MemoryRegion *mr;
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hwaddr addr;
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unsigned size;
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uint64_t data;
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EventNotifier e;
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VFIORegion *region;
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hwaddr region_addr;
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bool dynamic; /* Added runtime, removed on device reset */
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bool vfio;
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} VFIOIOEventFD;
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typedef struct VFIOQuirk {
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QLIST_ENTRY(VFIOQuirk) next;
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void *data;
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QLIST_HEAD(, VFIOIOEventFD) ioeventfds;
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int nr_mem;
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MemoryRegion *mem;
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void (*reset)(struct VFIOPCIDevice *vdev, struct VFIOQuirk *quirk);
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} VFIOQuirk;
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typedef struct VFIOBAR {
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VFIORegion region;
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MemoryRegion *mr;
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size_t size;
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uint8_t type;
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bool ioport;
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bool mem64;
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QLIST_HEAD(, VFIOQuirk) quirks;
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} VFIOBAR;
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typedef struct VFIOVGARegion {
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MemoryRegion mem;
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off_t offset;
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int nr;
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QLIST_HEAD(, VFIOQuirk) quirks;
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} VFIOVGARegion;
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typedef struct VFIOVGA {
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off_t fd_offset;
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int fd;
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VFIOVGARegion region[QEMU_PCI_VGA_NUM_REGIONS];
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} VFIOVGA;
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typedef struct VFIOINTx {
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bool pending; /* interrupt pending */
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bool kvm_accel; /* set when QEMU bypass through KVM enabled */
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uint8_t pin; /* which pin to pull for qemu_set_irq */
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EventNotifier interrupt; /* eventfd triggered on interrupt */
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EventNotifier unmask; /* eventfd for unmask on QEMU bypass */
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PCIINTxRoute route; /* routing info for QEMU bypass */
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uint32_t mmap_timeout; /* delay to re-enable mmaps after interrupt */
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QEMUTimer *mmap_timer; /* enable mmaps after periods w/o interrupts */
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} VFIOINTx;
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typedef struct VFIOMSIVector {
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/*
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* Two interrupt paths are configured per vector. The first, is only used
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* for interrupts injected via QEMU. This is typically the non-accel path,
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* but may also be used when we want QEMU to handle masking and pending
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* bits. The KVM path bypasses QEMU and is therefore higher performance,
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* but requires masking at the device. virq is used to track the MSI route
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* through KVM, thus kvm_interrupt is only available when virq is set to a
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* valid (>= 0) value.
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*/
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EventNotifier interrupt;
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EventNotifier kvm_interrupt;
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struct VFIOPCIDevice *vdev; /* back pointer to device */
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int virq;
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bool use;
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} VFIOMSIVector;
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enum {
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VFIO_INT_NONE = 0,
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VFIO_INT_INTx = 1,
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VFIO_INT_MSI = 2,
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VFIO_INT_MSIX = 3,
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};
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/* Cache of MSI-X setup */
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typedef struct VFIOMSIXInfo {
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uint8_t table_bar;
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uint8_t pba_bar;
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uint16_t entries;
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uint32_t table_offset;
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uint32_t pba_offset;
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unsigned long *pending;
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} VFIOMSIXInfo;
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typedef struct VFIOPCIDevice {
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PCIDevice pdev;
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VFIODevice vbasedev;
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VFIOINTx intx;
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unsigned int config_size;
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uint8_t *emulated_config_bits; /* QEMU emulated bits, little-endian */
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off_t config_offset; /* Offset of config space region within device fd */
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unsigned int rom_size;
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off_t rom_offset; /* Offset of ROM region within device fd */
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void *rom;
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int msi_cap_size;
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VFIOMSIVector *msi_vectors;
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VFIOMSIXInfo *msix;
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int nr_vectors; /* Number of MSI/MSIX vectors currently in use */
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int interrupt; /* Current interrupt type */
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VFIOBAR bars[PCI_NUM_REGIONS - 1]; /* No ROM */
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VFIOVGA *vga; /* 0xa0000, 0x3b0, 0x3c0 */
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void *igd_opregion;
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PCIHostDeviceAddress host;
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EventNotifier err_notifier;
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EventNotifier req_notifier;
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int (*resetfn)(struct VFIOPCIDevice *);
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uint32_t vendor_id;
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uint32_t device_id;
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uint32_t sub_vendor_id;
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uint32_t sub_device_id;
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uint32_t features;
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#define VFIO_FEATURE_ENABLE_VGA_BIT 0
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#define VFIO_FEATURE_ENABLE_VGA (1 << VFIO_FEATURE_ENABLE_VGA_BIT)
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#define VFIO_FEATURE_ENABLE_REQ_BIT 1
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#define VFIO_FEATURE_ENABLE_REQ (1 << VFIO_FEATURE_ENABLE_REQ_BIT)
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#define VFIO_FEATURE_ENABLE_IGD_OPREGION_BIT 2
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#define VFIO_FEATURE_ENABLE_IGD_OPREGION \
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(1 << VFIO_FEATURE_ENABLE_IGD_OPREGION_BIT)
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OnOffAuto display;
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uint32_t display_xres;
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uint32_t display_yres;
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int32_t bootindex;
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uint32_t igd_gms;
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OffAutoPCIBAR msix_relo;
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uint8_t pm_cap;
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uint8_t nv_gpudirect_clique;
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bool pci_aer;
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bool req_enabled;
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bool has_flr;
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bool has_pm_reset;
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bool rom_read_failed;
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bool no_kvm_intx;
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bool no_kvm_msi;
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bool no_kvm_msix;
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bool no_geforce_quirks;
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bool no_kvm_ioeventfd;
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bool no_vfio_ioeventfd;
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bool enable_ramfb;
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VFIODisplay *dpy;
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Error *migration_blocker;
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} VFIOPCIDevice;
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uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len);
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void vfio_pci_write_config(PCIDevice *pdev,
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uint32_t addr, uint32_t val, int len);
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uint64_t vfio_vga_read(void *opaque, hwaddr addr, unsigned size);
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void vfio_vga_write(void *opaque, hwaddr addr, uint64_t data, unsigned size);
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bool vfio_blacklist_opt_rom(VFIOPCIDevice *vdev);
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void vfio_vga_quirk_setup(VFIOPCIDevice *vdev);
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void vfio_vga_quirk_exit(VFIOPCIDevice *vdev);
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void vfio_vga_quirk_finalize(VFIOPCIDevice *vdev);
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void vfio_bar_quirk_setup(VFIOPCIDevice *vdev, int nr);
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void vfio_bar_quirk_exit(VFIOPCIDevice *vdev, int nr);
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void vfio_bar_quirk_finalize(VFIOPCIDevice *vdev, int nr);
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void vfio_setup_resetfn_quirk(VFIOPCIDevice *vdev);
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int vfio_add_virt_caps(VFIOPCIDevice *vdev, Error **errp);
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void vfio_quirk_reset(VFIOPCIDevice *vdev);
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extern const PropertyInfo qdev_prop_nv_gpudirect_clique;
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int vfio_populate_vga(VFIOPCIDevice *vdev, Error **errp);
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int vfio_pci_igd_opregion_init(VFIOPCIDevice *vdev,
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struct vfio_region_info *info,
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Error **errp);
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int vfio_pci_nvidia_v100_ram_init(VFIOPCIDevice *vdev, Error **errp);
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int vfio_pci_nvlink2_init(VFIOPCIDevice *vdev, Error **errp);
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void vfio_display_reset(VFIOPCIDevice *vdev);
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int vfio_display_probe(VFIOPCIDevice *vdev, Error **errp);
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void vfio_display_finalize(VFIOPCIDevice *vdev);
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#endif /* HW_VFIO_VFIO_PCI_H */
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