256 lines
9.3 KiB
Plaintext
256 lines
9.3 KiB
Plaintext
Paravirtualized RDMA Device (PVRDMA)
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====================================
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1. Description
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===============
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PVRDMA is the QEMU implementation of VMware's paravirtualized RDMA device.
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It works with its Linux Kernel driver AS IS, no need for any special guest
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modifications.
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While it complies with the VMware device, it can also communicate with bare
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metal RDMA-enabled machines and does not require an RDMA HCA in the host, it
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can work with Soft-RoCE (rxe).
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It does not require the whole guest RAM to be pinned allowing memory
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over-commit and, even if not implemented yet, migration support will be
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possible with some HW assistance.
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A project presentation accompany this document:
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- http://events.linuxfoundation.org/sites/events/files/slides/lpc-2017-pvrdma-marcel-apfelbaum-yuval-shaia.pdf
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2. Setup
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========
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2.1 Guest setup
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===============
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Fedora 27+ kernels work out of the box, older distributions
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require updating the kernel to 4.14 to include the pvrdma driver.
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However the libpvrdma library needed by User Level Software is still
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not available as part of the distributions, so the rdma-core library
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needs to be compiled and optionally installed.
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Please follow the instructions at:
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https://github.com/linux-rdma/rdma-core.git
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2.2 Host Setup
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==============
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The pvrdma backend is an ibdevice interface that can be exposed
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either by a Soft-RoCE(rxe) device on machines with no RDMA device,
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or an HCA SRIOV function(VF/PF).
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Note that ibdevice interfaces can't be shared between pvrdma devices,
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each one requiring a separate instance (rxe or SRIOV VF).
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2.2.1 Soft-RoCE backend(rxe)
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===========================
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A stable version of rxe is required, Fedora 27+ or a Linux
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Kernel 4.14+ is preferred.
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The rdma_rxe module is part of the Linux Kernel but not loaded by default.
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Install the User Level library (librxe) following the instructions from:
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https://github.com/SoftRoCE/rxe-dev/wiki/rxe-dev:-Home
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Associate an ETH interface with rxe by running:
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rxe_cfg add eth0
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An rxe0 ibdevice interface will be created and can be used as pvrdma backend.
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2.2.2 RDMA device Virtual Function backend
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==========================================
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Nothing special is required, the pvrdma device can work not only with
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Ethernet Links, but also Infinibands Links.
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All is needed is an ibdevice with an active port, for Mellanox cards
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will be something like mlx5_6 which can be the backend.
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2.2.3 QEMU setup
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================
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Configure QEMU with --enable-rdma flag, installing
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the required RDMA libraries.
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3. Usage
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========
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Currently the device is working only with memory backed RAM
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and it must be mark as "shared":
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-m 1G \
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-object memory-backend-ram,id=mb1,size=1G,share \
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-numa node,memdev=mb1 \
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The pvrdma device is composed of two functions:
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- Function 0 is a vmxnet Ethernet Device which is redundant in Guest
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but is required to pass the ibdevice GID using its MAC.
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Examples:
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For an rxe backend using eth0 interface it will use its mac:
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-device vmxnet3,addr=<slot>.0,multifunction=on,mac=<eth0 MAC>
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For an SRIOV VF, we take the Ethernet Interface exposed by it:
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-device vmxnet3,multifunction=on,mac=<RoCE eth MAC>
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- Function 1 is the actual device:
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-device pvrdma,addr=<slot>.1,backend-dev=<ibdevice>,backend-gid-idx=<gid>,backend-port=<port>
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where the ibdevice can be rxe or RDMA VF (e.g. mlx5_4)
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Note: Pay special attention that the GID at backend-gid-idx matches vmxnet's MAC.
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The rules of conversion are part of the RoCE spec, but since manual conversion
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is not required, spotting problems is not hard:
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Example: GID: fe80:0000:0000:0000:7efe:90ff:fecb:743a
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MAC: 7c:fe:90:cb:74:3a
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Note the difference between the first byte of the MAC and the GID.
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4. Implementation details
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=========================
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4.1 Overview
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============
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The device acts like a proxy between the Guest Driver and the host
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ibdevice interface.
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On configuration path:
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- For every hardware resource request (PD/QP/CQ/...) the pvrdma will request
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a resource from the backend interface, maintaining a 1-1 mapping
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between the guest and host.
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On data path:
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- Every post_send/receive received from the guest will be converted into
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a post_send/receive for the backend. The buffers data will not be touched
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or copied resulting in near bare-metal performance for large enough buffers.
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- Completions from the backend interface will result in completions for
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the pvrdma device.
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4.2 PCI BARs
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============
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PCI Bars:
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BAR 0 - MSI-X
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MSI-X vectors:
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(0) Command - used when execution of a command is completed.
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(1) Async - not in use.
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(2) Completion - used when a completion event is placed in
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device's CQ ring.
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BAR 1 - Registers
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--------------------------------------------------------
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| VERSION | DSR | CTL | REQ | ERR | ICR | IMR | MAC |
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--------------------------------------------------------
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DSR - Address of driver/device shared memory used
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for the command channel, used for passing:
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- General info such as driver version
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- Address of 'command' and 'response'
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- Address of async ring
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- Address of device's CQ ring
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- Device capabilities
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CTL - Device control operations (activate, reset etc)
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IMG - Set interrupt mask
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REQ - Command execution register
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ERR - Operation status
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BAR 2 - UAR
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---------------------------------------------------------
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| QP_NUM | SEND/RECV Flag || CQ_NUM | ARM/POLL Flag |
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---------------------------------------------------------
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- Offset 0 used for QP operations (send and recv)
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- Offset 4 used for CQ operations (arm and poll)
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4.3 Major flows
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===============
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4.3.1 Create CQ
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===============
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- Guest driver
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- Allocates pages for CQ ring
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- Creates page directory (pdir) to hold CQ ring's pages
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- Initializes CQ ring
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- Initializes 'Create CQ' command object (cqe, pdir etc)
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- Copies the command to 'command' address
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- Writes 0 into REQ register
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- Device
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- Reads the request object from the 'command' address
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- Allocates CQ object and initialize CQ ring based on pdir
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- Creates the backend CQ
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- Writes operation status to ERR register
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- Posts command-interrupt to guest
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- Guest driver
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- Reads the HW response code from ERR register
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4.3.2 Create QP
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===============
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- Guest driver
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- Allocates pages for send and receive rings
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- Creates page directory(pdir) to hold the ring's pages
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- Initializes 'Create QP' command object (max_send_wr,
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send_cq_handle, recv_cq_handle, pdir etc)
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- Copies the object to 'command' address
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- Write 0 into REQ register
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- Device
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- Reads the request object from 'command' address
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- Allocates the QP object and initialize
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- Send and recv rings based on pdir
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- Send and recv ring state
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- Creates the backend QP
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- Writes the operation status to ERR register
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- Posts command-interrupt to guest
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- Guest driver
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- Reads the HW response code from ERR register
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4.3.3 Post receive
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==================
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- Guest driver
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- Initializes a wqe and place it on recv ring
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- Write to qpn|qp_recv_bit (31) to QP offset in UAR
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- Device
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- Extracts qpn from UAR
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- Walks through the ring and does the following for each wqe
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- Prepares the backend CQE context to be used when
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receiving completion from backend (wr_id, op_code, emu_cq_num)
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- For each sge prepares backend sge
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- Calls backend's post_recv
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4.3.4 Process backend events
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============================
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- Done by a dedicated thread used to process backend events;
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at initialization is attached to the device and creates
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the communication channel.
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- Thread main loop:
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- Polls for completions
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- Extracts QEMU _cq_num, wr_id and op_code from context
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- Writes CQE to CQ ring
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- Writes CQ number to device CQ
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- Sends completion-interrupt to guest
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- Deallocates context
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- Acks the event to backend
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5. Limitations
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==============
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- The device obviously is limited by the Guest Linux Driver features implementation
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of the VMware device API.
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- Memory registration mechanism requires mremap for every page in the buffer in order
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to map it to a contiguous virtual address range. Since this is not the data path
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it should not matter much. If the default max mr size is increased, be aware that
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memory registration can take up to 0.5 seconds for 1GB of memory.
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- The device requires target page size to be the same as the host page size,
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otherwise it will fail to init.
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- QEMU cannot map guest RAM from a file descriptor if a pvrdma device is attached,
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so it can't work with huge pages. The limitation will be addressed in the future,
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however QEMU allocates Guest RAM with MADV_HUGEPAGE so if there are enough huge
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pages available, QEMU will use them. QEMU will fail to init if the requirements
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are not met.
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6. Performance
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==============
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By design the pvrdma device exits on each post-send/receive, so for small buffers
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the performance is affected; however for medium buffers it will became close to
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bare metal and from 1MB buffers and up it reaches bare metal performance.
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(tested with 2 VMs, the pvrdma devices connected to 2 VFs of the same device)
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All the above assumes no memory registration is done on data path.
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