27d6dea3d7
The NRF51 series SoC have 3 timer peripherals, each having 4 counters. To help differentiate which peripheral is accessed, display the timer ID in the trace events. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200504072822.18799-4-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
82 lines
2.1 KiB
C
82 lines
2.1 KiB
C
/*
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* nRF51 System-on-Chip Timer peripheral
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*
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* QEMU interface:
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* + sysbus MMIO regions 0: GPIO registers
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* + sysbus irq
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*
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* Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de>
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*
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* This code is licensed under the GPL version 2 or later. See
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* the COPYING file in the top-level directory.
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*/
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#ifndef NRF51_TIMER_H
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#define NRF51_TIMER_H
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#include "hw/sysbus.h"
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#include "qemu/timer.h"
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#define TYPE_NRF51_TIMER "nrf51_soc.timer"
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#define NRF51_TIMER(obj) OBJECT_CHECK(NRF51TimerState, (obj), TYPE_NRF51_TIMER)
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#define NRF51_TIMER_REG_COUNT 4
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#define NRF51_TIMER_TASK_START 0x000
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#define NRF51_TIMER_TASK_STOP 0x004
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#define NRF51_TIMER_TASK_COUNT 0x008
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#define NRF51_TIMER_TASK_CLEAR 0x00C
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#define NRF51_TIMER_TASK_SHUTDOWN 0x010
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#define NRF51_TIMER_TASK_CAPTURE_0 0x040
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#define NRF51_TIMER_TASK_CAPTURE_3 0x04C
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#define NRF51_TIMER_EVENT_COMPARE_0 0x140
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#define NRF51_TIMER_EVENT_COMPARE_1 0x144
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#define NRF51_TIMER_EVENT_COMPARE_2 0x148
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#define NRF51_TIMER_EVENT_COMPARE_3 0x14C
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#define NRF51_TIMER_REG_SHORTS 0x200
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#define NRF51_TIMER_REG_SHORTS_MASK 0xf0f
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#define NRF51_TIMER_REG_INTENSET 0x304
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#define NRF51_TIMER_REG_INTENCLR 0x308
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#define NRF51_TIMER_REG_INTEN_MASK 0xf0000
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#define NRF51_TIMER_REG_MODE 0x504
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#define NRF51_TIMER_REG_MODE_MASK 0x01
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#define NRF51_TIMER_TIMER 0
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#define NRF51_TIMER_COUNTER 1
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#define NRF51_TIMER_REG_BITMODE 0x508
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#define NRF51_TIMER_REG_BITMODE_MASK 0x03
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#define NRF51_TIMER_WIDTH_16 0
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#define NRF51_TIMER_WIDTH_8 1
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#define NRF51_TIMER_WIDTH_24 2
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#define NRF51_TIMER_WIDTH_32 3
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#define NRF51_TIMER_REG_PRESCALER 0x510
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#define NRF51_TIMER_REG_PRESCALER_MASK 0x0F
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#define NRF51_TIMER_REG_CC0 0x540
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#define NRF51_TIMER_REG_CC3 0x54C
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typedef struct NRF51TimerState {
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SysBusDevice parent_obj;
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MemoryRegion iomem;
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qemu_irq irq;
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uint8_t id;
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QEMUTimer timer;
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int64_t timer_start_ns;
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int64_t update_counter_ns;
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uint32_t counter;
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bool running;
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uint8_t events_compare[NRF51_TIMER_REG_COUNT];
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uint32_t cc[NRF51_TIMER_REG_COUNT];
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uint32_t shorts;
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uint32_t inten;
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uint32_t mode;
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uint32_t bitmode;
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uint32_t prescaler;
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} NRF51TimerState;
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#endif
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