076d4d39b6
Let's properly expose the CPU type (machine-type number) via "STORE CPU ID" and "STORE SUBSYSTEM INFORMATION". As TCG emulates basic mode, the CPU identification number has the format "Annnnn", whereby A is the CPU address, and n are parts of the CPU serial number (0 for us for now). A specification exception will be injected if the address is not aligned to a double word. Low address protection will not be checked as we're missing some more general support for that. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170609133426.11447-3-david@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net> |
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arch_dump.c | ||
cc_helper.c | ||
cpu_features_def.h | ||
cpu_features.c | ||
cpu_features.h | ||
cpu_models.c | ||
cpu_models.h | ||
cpu-qom.h | ||
cpu.c | ||
cpu.h | ||
fpu_helper.c | ||
gdbstub.c | ||
gen-features.c | ||
helper.c | ||
helper.h | ||
insn-data.def | ||
insn-format.def | ||
int_helper.c | ||
interrupt.c | ||
ioinst.c | ||
kvm.c | ||
machine.c | ||
Makefile.objs | ||
mem_helper.c | ||
misc_helper.c | ||
mmu_helper.c | ||
trace-events | ||
translate.c |