qemu-e2k/target/arm
Alistair Francis 4a2fdb78e7 target/arm: Require alignment for load exclusive
According to the ARM ARM exclusive loads require the same alignment as
exclusive stores. Let's update the memops used for the load to match
that of the store. This adds the alignment requirement to the memops.

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20170815145714.17635-4-richard.henderson@linaro.org
[rth: Require 16-byte alignment for 64-bit LDXP.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-08-15 17:38:44 +01:00
..
arch_dump.c
arm_ldst.h Fix Thumb-1 BE32 execution and disassembly. 2017-02-07 18:29:59 +00:00
arm-powerctl.c target-arm/powerctl: defer cpu reset work to CPU context 2017-02-24 10:32:46 +00:00
arm-powerctl.h target-arm/powerctl: defer cpu reset work to CPU context 2017-02-24 10:32:46 +00:00
arm-semi.c
cpu64.c target-arm: Enable EL2 feature bit on A53 and A57 2017-01-20 11:15:10 +00:00
cpu-qom.h
cpu.c target/arm: Move PMSAv7 reset into arm_cpu_reset() so M profile MPUs get reset 2017-07-31 13:09:52 +01:00
cpu.h target/arm: Rename cp15.c6_rgnr to pmsav7.rnr 2017-07-31 13:09:52 +01:00
crypto_helper.c
gdbstub64.c
gdbstub.c
helper-a64.c target-arm: Use clrsb helper 2017-01-10 08:47:48 -08:00
helper-a64.h target-arm: Use clrsb helper 2017-01-10 08:47:48 -08:00
helper.c target/arm: Move PMSAv7 reset into arm_cpu_reset() so M profile MPUs get reset 2017-07-31 13:09:52 +01:00
helper.h target-arm: Use clz opcode 2017-01-10 08:06:11 -08:00
internals.h arm: Move excnames[] array into arm_log_exceptions() 2017-04-20 17:39:17 +01:00
iwmmxt_helper.c
kvm32.c
kvm64.c arm/kvm: Remove trailing newlines from error_report() 2017-04-20 17:39:17 +01:00
kvm_arm.h
kvm-consts.h arm: add trailing ; after MISMATCH_CHECK 2017-02-01 03:37:18 +02:00
kvm-stub.c
kvm.c ARM: KVM: Enable in-kernel timers with user space gic 2017-07-11 11:21:26 +01:00
machine.c target/arm: Migrate MPU_RNR register state for M profile cores 2017-07-31 13:09:52 +01:00
Makefile.objs
monitor.c
neon_helper.c
op_addsub.h
op_helper.c arm: Add support for M profile CPUs having different MMU index semantics 2017-06-02 11:51:47 +01:00
psci.c shutdown: Add source information to SHUTDOWN and RESET 2017-05-23 13:28:17 +02:00
trace-events trace-events: fix code style: print 0x before hex numbers 2017-08-01 12:13:07 +01:00
translate-a64.c target/arm: Require alignment for load exclusive 2017-08-15 17:38:44 +01:00
translate.c tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
translate.h tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00