42659e046f
These helpers will be employed by the idef-parser generated code, to correctly implement instruction semantics. "Helper" functions, in the context of this patch, refers to functions which provide a manual TCG implementation of certain features. Signed-off-by: Alessandro Di Federico <ale@rev.ng> Signed-off-by: Niccolò Izzo <nizzo@rev.ng> Signed-off-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <20220923173831.227551-6-anjo@rev.ng>
62 lines
2.9 KiB
C
62 lines
2.9 KiB
C
/*
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* Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef HEXAGON_GENPTR_H
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#define HEXAGON_GENPTR_H
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#include "insn.h"
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#include "tcg/tcg.h"
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#include "translate.h"
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extern const SemanticInsn opcode_genptr[];
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void gen_store32(TCGv vaddr, TCGv src, int width, uint32_t slot);
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void gen_store1(TCGv_env cpu_env, TCGv vaddr, TCGv src, uint32_t slot);
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void gen_store2(TCGv_env cpu_env, TCGv vaddr, TCGv src, uint32_t slot);
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void gen_store4(TCGv_env cpu_env, TCGv vaddr, TCGv src, uint32_t slot);
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void gen_store8(TCGv_env cpu_env, TCGv vaddr, TCGv_i64 src, uint32_t slot);
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void gen_store1i(TCGv_env cpu_env, TCGv vaddr, int32_t src, uint32_t slot);
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void gen_store2i(TCGv_env cpu_env, TCGv vaddr, int32_t src, uint32_t slot);
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void gen_store4i(TCGv_env cpu_env, TCGv vaddr, int32_t src, uint32_t slot);
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void gen_store8i(TCGv_env cpu_env, TCGv vaddr, int64_t src, uint32_t slot);
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TCGv gen_read_reg(TCGv result, int num);
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TCGv gen_read_preg(TCGv pred, uint8_t num);
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void gen_log_reg_write(int rnum, TCGv val);
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void gen_log_pred_write(DisasContext *ctx, int pnum, TCGv val);
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void gen_set_usr_field(int field, TCGv val);
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void gen_set_usr_fieldi(int field, int x);
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void gen_set_usr_field_if(int field, TCGv val);
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void gen_sat_i32(TCGv dest, TCGv source, int width);
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void gen_sat_i32_ovfl(TCGv ovfl, TCGv dest, TCGv source, int width);
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void gen_satu_i32(TCGv dest, TCGv source, int width);
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void gen_satu_i32_ovfl(TCGv ovfl, TCGv dest, TCGv source, int width);
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void gen_sat_i64(TCGv_i64 dest, TCGv_i64 source, int width);
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void gen_sat_i64_ovfl(TCGv ovfl, TCGv_i64 dest, TCGv_i64 source, int width);
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void gen_satu_i64(TCGv_i64 dest, TCGv_i64 source, int width);
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void gen_satu_i64_ovfl(TCGv ovfl, TCGv_i64 dest, TCGv_i64 source, int width);
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void gen_add_sat_i64(TCGv_i64 ret, TCGv_i64 a, TCGv_i64 b);
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TCGv gen_8bitsof(TCGv result, TCGv value);
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void gen_set_byte_i64(int N, TCGv_i64 result, TCGv src);
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TCGv gen_get_byte(TCGv result, int N, TCGv src, bool sign);
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TCGv gen_get_byte_i64(TCGv result, int N, TCGv_i64 src, bool sign);
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TCGv gen_get_half(TCGv result, int N, TCGv src, bool sign);
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void gen_set_half(int N, TCGv result, TCGv src);
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void gen_set_half_i64(int N, TCGv_i64 result, TCGv src);
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void probe_noshuf_load(TCGv va, int s, int mi);
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#endif
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