qemu-e2k/target-ppc
David Gibson 02d4eae4b0 ppc: Alter CPU state to mask out TCG unimplemented instructions as appropriate
The CPU state contains two bitmaps, initialized from the CPU spec
which describes which instructions are implemented on the CPU.  A
couple of bits are defined which cover instructions (VSX and DFP)
which are not currently implemented in TCG.  So far, these are only
used to handle the case of -cpu host because a KVM guest can use
the instructions when the host CPU supports them.

However, it's a mild layering violation to simply not include those
bits in the CPU descriptions for those CPUs that do support them,
just because we can't handle them in TCG.  This patch corrects the
situation, so that the instruction bits _are_ shown correctly in the
cpu spec table, but are masked out from the cpu state in the non-KVM
case.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-31 02:57:56 +01:00
..
cpu.h ppc: Alter CPU state to mask out TCG unimplemented instructions as appropriate 2011-10-31 02:57:56 +01:00
helper_regs.h
helper.c pseries: Support SMT systems for KVM Book3S-HV 2011-10-30 17:11:53 +01:00
helper.h
kvm_ppc.c PPC: KVM: Remove kvmppc_read_host_property 2011-10-06 09:43:35 +02:00
kvm_ppc.h ppc: Fix up usermode only builds 2011-10-30 20:03:27 +01:00
kvm.c pseries: Allow writes to KVM accelerated TCE table 2011-10-30 20:03:27 +01:00
machine.c
mfrom_table_gen.c
mfrom_table.c
op_helper.c softmmu_header: pass CPUState to tlb_fill 2011-10-01 09:31:26 +00:00
STATUS
translate_init.c ppc: Alter CPU state to mask out TCG unimplemented instructions as appropriate 2011-10-31 02:57:56 +01:00
translate.c Set an invalid-bits mask for each SPE instructions 2011-10-30 17:11:53 +01:00