d7d5601c78
Follow what kernel's full_exception() is doing. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20230214140829.45392-4-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
166 lines
5.5 KiB
C
166 lines
5.5 KiB
C
/*
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* qemu user cpu loop
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*
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* Copyright (c) 2003-2008 Fabrice Bellard
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "qemu.h"
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#include "user-internals.h"
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#include "cpu_loop-common.h"
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#include "signal-common.h"
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void cpu_loop(CPUMBState *env)
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{
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int trapnr, ret, si_code, sig;
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CPUState *cs = env_cpu(env);
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while (1) {
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cpu_exec_start(cs);
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trapnr = cpu_exec(cs);
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cpu_exec_end(cs);
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process_queued_cpu_work(cs);
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switch (trapnr) {
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case EXCP_INTERRUPT:
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/* just indicate that signals should be handled asap */
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break;
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case EXCP_SYSCALL:
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/* Return address is 4 bytes after the call. */
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env->regs[14] += 4;
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env->pc = env->regs[14];
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ret = do_syscall(env,
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env->regs[12],
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env->regs[5],
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env->regs[6],
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env->regs[7],
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env->regs[8],
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env->regs[9],
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env->regs[10],
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0, 0);
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if (ret == -QEMU_ERESTARTSYS) {
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/* Wind back to before the syscall. */
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env->pc -= 4;
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} else if (ret != -QEMU_ESIGRETURN) {
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env->regs[3] = ret;
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}
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/* All syscall exits result in guest r14 being equal to the
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* PC we return to, because the kernel syscall exit "rtbd" does
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* this. (This is true even for sigreturn(); note that r14 is
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* not a userspace-usable register, as the kernel may clobber it
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* at any point.)
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*/
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env->regs[14] = env->pc;
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break;
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case EXCP_HW_EXCP:
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env->regs[17] = env->pc + 4;
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if (env->iflags & D_FLAG) {
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env->esr |= 1 << 12;
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env->pc -= 4;
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/* FIXME: if branch was immed, replay the imm as well. */
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}
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env->iflags &= ~(IMM_FLAG | D_FLAG);
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switch (env->esr & 31) {
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case ESR_EC_DIVZERO:
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sig = TARGET_SIGFPE;
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si_code = TARGET_FPE_INTDIV;
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break;
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case ESR_EC_FPU:
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/*
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* Note that the kernel passes along fsr as si_code
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* if there's no recognized bit set. Possibly this
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* implies that si_code is 0, but follow the structure.
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*/
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sig = TARGET_SIGFPE;
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si_code = env->fsr;
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if (si_code & FSR_IO) {
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si_code = TARGET_FPE_FLTINV;
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} else if (si_code & FSR_OF) {
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si_code = TARGET_FPE_FLTOVF;
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} else if (si_code & FSR_UF) {
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si_code = TARGET_FPE_FLTUND;
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} else if (si_code & FSR_DZ) {
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si_code = TARGET_FPE_FLTDIV;
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} else if (si_code & FSR_DO) {
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si_code = TARGET_FPE_FLTRES;
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}
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break;
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case ESR_EC_PRIVINSN:
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sig = SIGILL;
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si_code = ILL_PRVOPC;
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break;
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default:
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fprintf(stderr, "Unhandled hw-exception: 0x%x\n",
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env->esr & ESR_EC_MASK);
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cpu_dump_state(cs, stderr, 0);
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exit(EXIT_FAILURE);
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}
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force_sig_fault(sig, si_code, env->pc);
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break;
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case EXCP_DEBUG:
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force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->pc);
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break;
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case EXCP_ATOMIC:
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cpu_exec_step_atomic(cs);
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break;
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default:
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fprintf(stderr, "Unhandled trap: 0x%x\n", trapnr);
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cpu_dump_state(cs, stderr, 0);
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exit(EXIT_FAILURE);
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}
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process_pending_signals (env);
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}
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}
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void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
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{
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env->regs[0] = regs->r0;
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env->regs[1] = regs->r1;
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env->regs[2] = regs->r2;
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env->regs[3] = regs->r3;
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env->regs[4] = regs->r4;
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env->regs[5] = regs->r5;
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env->regs[6] = regs->r6;
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env->regs[7] = regs->r7;
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env->regs[8] = regs->r8;
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env->regs[9] = regs->r9;
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env->regs[10] = regs->r10;
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env->regs[11] = regs->r11;
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env->regs[12] = regs->r12;
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env->regs[13] = regs->r13;
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env->regs[14] = regs->r14;
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env->regs[15] = regs->r15;
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env->regs[16] = regs->r16;
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env->regs[17] = regs->r17;
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env->regs[18] = regs->r18;
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env->regs[19] = regs->r19;
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env->regs[20] = regs->r20;
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env->regs[21] = regs->r21;
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env->regs[22] = regs->r22;
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env->regs[23] = regs->r23;
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env->regs[24] = regs->r24;
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env->regs[25] = regs->r25;
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env->regs[26] = regs->r26;
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env->regs[27] = regs->r27;
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env->regs[28] = regs->r28;
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env->regs[29] = regs->r29;
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env->regs[30] = regs->r30;
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env->regs[31] = regs->r31;
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env->pc = regs->pc;
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}
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