qemu-e2k/target/mips
Yongbok Kim 99029be1c2 target/mips: Add implementation of GINVT instruction
Implement emulation of GINVT instruction. As QEMU doesn't support
caches and virtualization, this implementation covers only one
instruction (GINVT - Global Invalidate TLB) among all TLB-related
MIPS instructions.

Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1579883929-1517-5-git-send-email-aleksandar.markovic@rt-rk.com>
2020-01-29 19:28:52 +01:00
..
cp0_timer.c
cpu-param.h
cpu-qom.h
cpu.c
cpu.h target/mips: Add implementation of GINVT instruction 2020-01-29 19:28:52 +01:00
dsp_helper.c
gdbstub.c
helper.c target/mips: Add implementation of GINVT instruction 2020-01-29 19:28:52 +01:00
helper.h target/mips: Add implementation of GINVT instruction 2020-01-29 19:28:52 +01:00
internal.h target/mips: Add implementation of GINVT instruction 2020-01-29 19:28:52 +01:00
kvm_mips.h
kvm.c
lmi_helper.c
machine.c
Makefile.objs
mips-defs.h
mips-semi.c
msa_helper.c
op_helper.c target/mips: Add implementation of GINVT instruction 2020-01-29 19:28:52 +01:00
TODO
trace-events
translate_init.inc.c
translate.c target/mips: Add implementation of GINVT instruction 2020-01-29 19:28:52 +01:00