99029be1c2
Implement emulation of GINVT instruction. As QEMU doesn't support caches and virtualization, this implementation covers only one instruction (GINVT - Global Invalidate TLB) among all TLB-related MIPS instructions. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com> Signed-off-by: Yongbok Kim <yongbok.kim@mips.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1579883929-1517-5-git-send-email-aleksandar.markovic@rt-rk.com> |
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cp0_timer.c | ||
cpu-param.h | ||
cpu-qom.h | ||
cpu.c | ||
cpu.h | ||
dsp_helper.c | ||
gdbstub.c | ||
helper.c | ||
helper.h | ||
internal.h | ||
kvm_mips.h | ||
kvm.c | ||
lmi_helper.c | ||
machine.c | ||
Makefile.objs | ||
mips-defs.h | ||
mips-semi.c | ||
msa_helper.c | ||
op_helper.c | ||
TODO | ||
trace-events | ||
translate_init.inc.c | ||
translate.c |