qemu-e2k

History

Peter Crosthwaite ea3e984740 cpu-exec: Purge all uses of ENV_GET_CPU() Remove un-needed usages of ENV_GET_CPU() by converting the APIs to use CPUState pointers and retrieving the env_ptr as minimally needed. Scripted conversion for target-* change: for I in target-/cpu.h; do sed -i \ 's/$^int cpu_[^_]_exec($[^ ][^ ]* \s);$/\1CPUState cpu);/' \ $I; done Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>		2015-07-09 15:20:40 +02:00
..
cpu-qom.h	target-lm32: Use cpu_exec_interrupt qom hook	2014-09-25 18:54:22 +01:00
cpu.c	cpu: Change cpu_exec_init() arg to cpu, not env	2015-07-09 15:20:40 +02:00
cpu.h	cpu-exec: Purge all uses of ENV_GET_CPU()	2015-07-09 15:20:40 +02:00
gdbstub.c
helper.c	semihosting: create SemihostingConfig structure and semihost.h	2015-06-19 14:17:45 +01:00
helper.h	tcg: Invert the inclusion of helper.h	2014-05-28 09:33:54 -07:00
lm32-semi.c	tcg: Invert the inclusion of helper.h	2014-05-28 09:33:54 -07:00
machine.c
Makefile.objs
op_helper.c	vl: allow other threads to do qemu_system_vmstop_request	2014-06-23 16:36:13 +08:00
README
TODO
translate.c	disas: Remove uses of CPU env	2015-06-22 17:40:01 +02:00

README

LatticeMico32 target
--------------------

General
-------
All opcodes including the JUART CSRs are supported.


JTAG UART
---------
JTAG UART is routed to a serial console device. For the current boards it
is the second one. Ie to enable it in the qemu virtual console window use
the following command line parameters:
  -serial vc -serial vc
This will make serial0 (the lm32_uart) and serial1 (the JTAG UART)
available as virtual consoles.


Semihosting
-----------
Semihosting on this target is supported. Some system calls like read, write
and exit are executed on the host if semihosting is enabled. See
target/lm32-semi.c for all supported system calls. Emulation aware programs
can use this mechanism to shut down the virtual machine and print to the
host console. See the tcg tests for an example.


Special instructions
--------------------
The translation recognizes one special instruction to halt the cpu:
  and r0, r0, r0
On real hardware this instruction is a nop. It is not used by GCC and
should (hopefully) not be used within hand-crafted assembly.
Insert this instruction in your idle loop to reduce the cpu load on the
host.


Ignoring the MSB of the address bus
-----------------------------------
Some SoC ignores the MSB on the address bus. Thus creating a shadow memory
area. As a general rule, 0x00000000-0x7fffffff is cached, whereas
0x80000000-0xffffffff is not cached and used to access IO devices. This
behaviour can be enabled with:
  cpu_lm32_set_phys_msb_ignore(env, 1);