Max Filippov 7aa7834187 target/xtensa: reorganize access to MAC16 registers ... libisa represents MAC16 registers m0..m3 as an MR register file. Add this register file and reference its registers directly from the translate_mac16. Drop translator parameter that indicates whether opcode argument is in ar or in mr. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>		2019-02-28 04:43:22 -08:00
..
alpha	avoid TABs in files that only contain a few	2019-01-11 15:46:56 +01:00
arm	target/arm: fix decoding of B{,L}RA{A,B}	2019-02-01 15:25:24 +00:00
cris	avoid TABs in files that only contain a few	2019-01-11 15:46:56 +01:00
hppa	vmstate: constify VMStateField	2018-11-27 15:35:15 +01:00
i386	- add device category (edu, i8042, sd memory card)	2019-01-31 15:40:39 +00:00
lm32
m68k	target/m68k: Fix LGPL information in the file headers	2019-01-30 14:20:13 +01:00
microblaze	target/microblaze: Add props enabling exceptions on failed bus accesses	2019-01-22 03:17:34 -08:00
mips	target/mips: Add I6500 core configuration	2019-01-24 17:48:33 +01:00
moxie
nios2
openrisc	target/openrisc: Fix LGPL version number	2019-01-30 11:01:36 +01:00
ppc	target/ppc: remove various HOST_WORDS_BIGENDIAN hacks in int_helper.c	2019-02-04 18:44:20 +11:00
riscv	RISC-V: Implement existential predicates for CSRs	2019-01-09 10:00:56 -08:00
s390x	target/s390x: Fix LGPL version in the file header comments	2019-01-30 11:04:02 +01:00
sh4
sparc	qdev-props: remove errp from GlobalProperty	2019-01-07 16:18:42 +04:00
tilegx	avoid TABs in files that only contain a few	2019-01-11 15:46:56 +01:00
tricore	target/tricore: Fix LGPL version number	2019-01-30 11:01:46 +01:00
unicore32	target/unicore32: remove tlb_flush from uc32_init_fn	2018-10-18 18:58:10 -07:00
xtensa	target/xtensa: reorganize access to MAC16 registers	2019-02-28 04:43:22 -08:00