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qemu-e2k/target/cris
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Richard Henderson e4fdf9df5b hw/core: Add CPUClass.get_pc 
Populate this new method for all targets.  Always match
the result that would be given by cpu_get_tb_cpu_state,
as we will want these values to correspond in the logs.

Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> (target/sparc)
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
Cc: Eduardo Habkost <eduardo@habkost.net> (supporter:Machine core)
Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> (supporter:Machine core)
Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org> (reviewer:Machine core)
Cc: Yanan Wang <wangyanan55@huawei.com> (reviewer:Machine core)
Cc: Michael Rolnik <mrolnik@gmail.com> (maintainer:AVR TCG CPUs)
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> (maintainer:CRIS TCG CPUs)
Cc: Taylor Simpson <tsimpson@quicinc.com> (supporter:Hexagon TCG CPUs)
Cc: Song Gao <gaosong@loongson.cn> (maintainer:LoongArch TCG CPUs)
Cc: Xiaojuan Yang <yangxiaojuan@loongson.cn> (maintainer:LoongArch TCG CPUs)
Cc: Laurent Vivier <laurent@vivier.eu> (maintainer:M68K TCG CPUs)
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> (reviewer:MIPS TCG CPUs)
Cc: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> (reviewer:MIPS TCG CPUs)
Cc: Chris Wulff <crwulff@gmail.com> (maintainer:NiosII TCG CPUs)
Cc: Marek Vasut <marex@denx.de> (maintainer:NiosII TCG CPUs)
Cc: Stafford Horne <shorne@gmail.com> (odd fixer:OpenRISC TCG CPUs)
Cc: Yoshinori Sato <ysato@users.sourceforge.jp> (reviewer:RENESAS RX CPUs)
Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> (maintainer:SPARC TCG CPUs)
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> (maintainer:TriCore TCG CPUs)
Cc: Max Filippov <jcmvbkbc@gmail.com> (maintainer:Xtensa TCG CPUs)
Cc: qemu-arm@nongnu.org (open list:ARM TCG CPUs)
Cc: qemu-ppc@nongnu.org (open list:PowerPC TCG CPUs)
Cc: qemu-riscv@nongnu.org (open list:RISC-V TCG CPUs)
Cc: qemu-s390x@nongnu.org (open list:S390 TCG CPUs)
2022-10-04 12:13:12 -07:00
..
cpu-param.h Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
cpu-qom.h target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macro 2022-03-06 22:23:09 +01:00
cpu.c hw/core: Add CPUClass.get_pc 2022-10-04 12:13:12 -07:00
cpu.h target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
crisv10-decode.h cris tcg cpus: Fix Lesser GPL version number 2020-11-15 16:39:05 +01:00
crisv32-decode.h cris tcg cpus: Fix Lesser GPL version number 2020-11-15 16:39:05 +01:00
gdbstub.c cris tcg cpus: Fix Lesser GPL version number 2020-11-15 16:39:05 +01:00
helper.c exec/exec-all: Move 'qemu/log.h' include in units requiring it 2022-02-21 10:18:06 +01:00
helper.h target/cris: Mark helper_raise_exception noreturn 2021-06-29 10:04:56 -07:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
machine.c cris tcg cpus: Fix Lesser GPL version number 2020-11-15 16:39:05 +01:00
meson.build target/cris: Make cris_cpu_tlb_fill sysemu only 2021-11-02 07:00:52 -04:00
mmu.c target/cris: Let cris_mmu_translate() use MMUAccessType access_type 2021-02-22 09:04:58 +01:00
mmu.h target/cris: Let cris_mmu_translate() use MMUAccessType access_type 2021-02-22 09:04:58 +01:00
op_helper.c cris tcg cpus: Fix Lesser GPL version number 2020-11-15 16:39:05 +01:00
opcode-cris.h
translate_v10.c.inc target/cris: Remove dc->flagx_known 2021-06-29 10:04:56 -07:00
translate.c accel/tcg: Add pc and host_pc params to gen_intermediate_code 2022-09-06 08:04:26 +01:00