470 lines
13 KiB
C
470 lines
13 KiB
C
/*
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* defines common to all virtual CPUs
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef CPU_ALL_H
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#define CPU_ALL_H
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#include "qemu-common.h"
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#include "exec/cpu-common.h"
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#include "exec/memory.h"
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#include "qemu/thread.h"
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#include "qom/cpu.h"
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/* some important defines:
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*
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* WORDS_ALIGNED : if defined, the host cpu can only make word aligned
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* memory accesses.
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*
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* HOST_WORDS_BIGENDIAN : if defined, the host cpu is big endian and
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* otherwise little endian.
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*
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* (TARGET_WORDS_ALIGNED : same for target cpu (not supported yet))
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*
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* TARGET_WORDS_BIGENDIAN : same for target cpu
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*/
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#if defined(HOST_WORDS_BIGENDIAN) != defined(TARGET_WORDS_BIGENDIAN)
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#define BSWAP_NEEDED
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#endif
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#ifdef BSWAP_NEEDED
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static inline uint16_t tswap16(uint16_t s)
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{
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return bswap16(s);
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}
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static inline uint32_t tswap32(uint32_t s)
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{
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return bswap32(s);
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}
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static inline uint64_t tswap64(uint64_t s)
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{
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return bswap64(s);
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}
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static inline void tswap16s(uint16_t *s)
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{
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*s = bswap16(*s);
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}
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static inline void tswap32s(uint32_t *s)
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{
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*s = bswap32(*s);
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}
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static inline void tswap64s(uint64_t *s)
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{
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*s = bswap64(*s);
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}
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#else
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static inline uint16_t tswap16(uint16_t s)
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{
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return s;
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}
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static inline uint32_t tswap32(uint32_t s)
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{
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return s;
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}
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static inline uint64_t tswap64(uint64_t s)
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{
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return s;
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}
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static inline void tswap16s(uint16_t *s)
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{
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}
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static inline void tswap32s(uint32_t *s)
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{
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}
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static inline void tswap64s(uint64_t *s)
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{
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}
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#endif
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#if TARGET_LONG_SIZE == 4
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#define tswapl(s) tswap32(s)
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#define tswapls(s) tswap32s((uint32_t *)(s))
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#define bswaptls(s) bswap32s(s)
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#else
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#define tswapl(s) tswap64(s)
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#define tswapls(s) tswap64s((uint64_t *)(s))
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#define bswaptls(s) bswap64s(s)
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#endif
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/* CPU memory access without any memory or io remapping */
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/*
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* the generic syntax for the memory accesses is:
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*
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* load: ld{type}{sign}{size}{endian}_{access_type}(ptr)
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*
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* store: st{type}{size}{endian}_{access_type}(ptr, val)
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*
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* type is:
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* (empty): integer access
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* f : float access
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*
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* sign is:
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* (empty): for floats or 32 bit size
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* u : unsigned
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* s : signed
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*
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* size is:
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* b: 8 bits
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* w: 16 bits
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* l: 32 bits
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* q: 64 bits
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*
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* endian is:
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* (empty): target cpu endianness or 8 bit access
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* r : reversed target cpu endianness (not implemented yet)
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* be : big endian (not implemented yet)
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* le : little endian (not implemented yet)
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*
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* access_type is:
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* raw : host memory access
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* user : user mode access using soft MMU
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* kernel : kernel mode access using soft MMU
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*/
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/* target-endianness CPU memory access functions */
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#if defined(TARGET_WORDS_BIGENDIAN)
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#define lduw_p(p) lduw_be_p(p)
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#define ldsw_p(p) ldsw_be_p(p)
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#define ldl_p(p) ldl_be_p(p)
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#define ldq_p(p) ldq_be_p(p)
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#define ldfl_p(p) ldfl_be_p(p)
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#define ldfq_p(p) ldfq_be_p(p)
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#define stw_p(p, v) stw_be_p(p, v)
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#define stl_p(p, v) stl_be_p(p, v)
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#define stq_p(p, v) stq_be_p(p, v)
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#define stfl_p(p, v) stfl_be_p(p, v)
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#define stfq_p(p, v) stfq_be_p(p, v)
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#else
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#define lduw_p(p) lduw_le_p(p)
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#define ldsw_p(p) ldsw_le_p(p)
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#define ldl_p(p) ldl_le_p(p)
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#define ldq_p(p) ldq_le_p(p)
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#define ldfl_p(p) ldfl_le_p(p)
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#define ldfq_p(p) ldfq_le_p(p)
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#define stw_p(p, v) stw_le_p(p, v)
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#define stl_p(p, v) stl_le_p(p, v)
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#define stq_p(p, v) stq_le_p(p, v)
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#define stfl_p(p, v) stfl_le_p(p, v)
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#define stfq_p(p, v) stfq_le_p(p, v)
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#endif
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/* MMU memory access macros */
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#if defined(CONFIG_USER_ONLY)
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#include <assert.h>
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#include "exec/user/abitypes.h"
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/* On some host systems the guest address space is reserved on the host.
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* This allows the guest address space to be offset to a convenient location.
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*/
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#if defined(CONFIG_USE_GUEST_BASE)
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extern unsigned long guest_base;
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extern int have_guest_base;
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extern unsigned long reserved_va;
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#define GUEST_BASE guest_base
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#define RESERVED_VA reserved_va
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#else
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#define GUEST_BASE 0ul
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#define RESERVED_VA 0ul
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#endif
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/* All direct uses of g2h and h2g need to go away for usermode softmmu. */
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#define g2h(x) ((void *)((unsigned long)(target_ulong)(x) + GUEST_BASE))
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#if HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS
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#define h2g_valid(x) 1
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#else
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#define h2g_valid(x) ({ \
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unsigned long __guest = (unsigned long)(x) - GUEST_BASE; \
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(__guest < (1ul << TARGET_VIRT_ADDR_SPACE_BITS)) && \
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(!RESERVED_VA || (__guest < RESERVED_VA)); \
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})
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#endif
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#define h2g_nocheck(x) ({ \
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unsigned long __ret = (unsigned long)(x) - GUEST_BASE; \
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(abi_ulong)__ret; \
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})
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#define h2g(x) ({ \
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/* Check if given address fits target address space */ \
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assert(h2g_valid(x)); \
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h2g_nocheck(x); \
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})
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#define saddr(x) g2h(x)
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#define laddr(x) g2h(x)
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#else /* !CONFIG_USER_ONLY */
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/* NOTE: we use double casts if pointers and target_ulong have
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different sizes */
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#define saddr(x) (uint8_t *)(intptr_t)(x)
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#define laddr(x) (uint8_t *)(intptr_t)(x)
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#endif
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#define ldub_raw(p) ldub_p(laddr((p)))
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#define ldsb_raw(p) ldsb_p(laddr((p)))
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#define lduw_raw(p) lduw_p(laddr((p)))
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#define ldsw_raw(p) ldsw_p(laddr((p)))
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#define ldl_raw(p) ldl_p(laddr((p)))
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#define ldq_raw(p) ldq_p(laddr((p)))
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#define ldfl_raw(p) ldfl_p(laddr((p)))
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#define ldfq_raw(p) ldfq_p(laddr((p)))
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#define stb_raw(p, v) stb_p(saddr((p)), v)
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#define stw_raw(p, v) stw_p(saddr((p)), v)
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#define stl_raw(p, v) stl_p(saddr((p)), v)
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#define stq_raw(p, v) stq_p(saddr((p)), v)
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#define stfl_raw(p, v) stfl_p(saddr((p)), v)
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#define stfq_raw(p, v) stfq_p(saddr((p)), v)
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#if defined(CONFIG_USER_ONLY)
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/* if user mode, no other memory access functions */
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#define ldub(p) ldub_raw(p)
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#define ldsb(p) ldsb_raw(p)
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#define lduw(p) lduw_raw(p)
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#define ldsw(p) ldsw_raw(p)
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#define ldl(p) ldl_raw(p)
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#define ldq(p) ldq_raw(p)
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#define ldfl(p) ldfl_raw(p)
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#define ldfq(p) ldfq_raw(p)
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#define stb(p, v) stb_raw(p, v)
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#define stw(p, v) stw_raw(p, v)
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#define stl(p, v) stl_raw(p, v)
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#define stq(p, v) stq_raw(p, v)
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#define stfl(p, v) stfl_raw(p, v)
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#define stfq(p, v) stfq_raw(p, v)
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#define cpu_ldub_code(env1, p) ldub_raw(p)
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#define cpu_ldsb_code(env1, p) ldsb_raw(p)
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#define cpu_lduw_code(env1, p) lduw_raw(p)
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#define cpu_ldsw_code(env1, p) ldsw_raw(p)
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#define cpu_ldl_code(env1, p) ldl_raw(p)
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#define cpu_ldq_code(env1, p) ldq_raw(p)
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#define cpu_ldub_data(env, addr) ldub_raw(addr)
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#define cpu_lduw_data(env, addr) lduw_raw(addr)
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#define cpu_ldsw_data(env, addr) ldsw_raw(addr)
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#define cpu_ldl_data(env, addr) ldl_raw(addr)
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#define cpu_ldq_data(env, addr) ldq_raw(addr)
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#define cpu_stb_data(env, addr, data) stb_raw(addr, data)
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#define cpu_stw_data(env, addr, data) stw_raw(addr, data)
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#define cpu_stl_data(env, addr, data) stl_raw(addr, data)
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#define cpu_stq_data(env, addr, data) stq_raw(addr, data)
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#define cpu_ldub_kernel(env, addr) ldub_raw(addr)
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#define cpu_lduw_kernel(env, addr) lduw_raw(addr)
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#define cpu_ldsw_kernel(env, addr) ldsw_raw(addr)
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#define cpu_ldl_kernel(env, addr) ldl_raw(addr)
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#define cpu_ldq_kernel(env, addr) ldq_raw(addr)
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#define cpu_stb_kernel(env, addr, data) stb_raw(addr, data)
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#define cpu_stw_kernel(env, addr, data) stw_raw(addr, data)
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#define cpu_stl_kernel(env, addr, data) stl_raw(addr, data)
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#define cpu_stq_kernel(env, addr, data) stq_raw(addr, data)
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#define ldub_kernel(p) ldub_raw(p)
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#define ldsb_kernel(p) ldsb_raw(p)
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#define lduw_kernel(p) lduw_raw(p)
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#define ldsw_kernel(p) ldsw_raw(p)
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#define ldl_kernel(p) ldl_raw(p)
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#define ldq_kernel(p) ldq_raw(p)
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#define ldfl_kernel(p) ldfl_raw(p)
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#define ldfq_kernel(p) ldfq_raw(p)
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#define stb_kernel(p, v) stb_raw(p, v)
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#define stw_kernel(p, v) stw_raw(p, v)
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#define stl_kernel(p, v) stl_raw(p, v)
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#define stq_kernel(p, v) stq_raw(p, v)
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#define stfl_kernel(p, v) stfl_raw(p, v)
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#define stfq_kernel(p, vt) stfq_raw(p, v)
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#define cpu_ldub_data(env, addr) ldub_raw(addr)
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#define cpu_lduw_data(env, addr) lduw_raw(addr)
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#define cpu_ldl_data(env, addr) ldl_raw(addr)
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#define cpu_stb_data(env, addr, data) stb_raw(addr, data)
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#define cpu_stw_data(env, addr, data) stw_raw(addr, data)
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#define cpu_stl_data(env, addr, data) stl_raw(addr, data)
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#endif /* defined(CONFIG_USER_ONLY) */
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/* page related stuff */
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#define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS)
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#define TARGET_PAGE_MASK ~(TARGET_PAGE_SIZE - 1)
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#define TARGET_PAGE_ALIGN(addr) (((addr) + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK)
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/* ??? These should be the larger of uintptr_t and target_ulong. */
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extern uintptr_t qemu_real_host_page_size;
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extern uintptr_t qemu_host_page_size;
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extern uintptr_t qemu_host_page_mask;
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#define HOST_PAGE_ALIGN(addr) (((addr) + qemu_host_page_size - 1) & qemu_host_page_mask)
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/* same as PROT_xxx */
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#define PAGE_READ 0x0001
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#define PAGE_WRITE 0x0002
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#define PAGE_EXEC 0x0004
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#define PAGE_BITS (PAGE_READ | PAGE_WRITE | PAGE_EXEC)
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#define PAGE_VALID 0x0008
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/* original state of the write flag (used when tracking self-modifying
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code */
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#define PAGE_WRITE_ORG 0x0010
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#if defined(CONFIG_BSD) && defined(CONFIG_USER_ONLY)
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/* FIXME: Code that sets/uses this is broken and needs to go away. */
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#define PAGE_RESERVED 0x0020
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#endif
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#if defined(CONFIG_USER_ONLY)
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void page_dump(FILE *f);
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typedef int (*walk_memory_regions_fn)(void *, abi_ulong,
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abi_ulong, unsigned long);
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int walk_memory_regions(void *, walk_memory_regions_fn);
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int page_get_flags(target_ulong address);
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void page_set_flags(target_ulong start, target_ulong end, int flags);
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int page_check_range(target_ulong start, target_ulong len, int flags);
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#endif
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CPUArchState *cpu_copy(CPUArchState *env);
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/* Flags for use in ENV->INTERRUPT_PENDING.
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The numbers assigned here are non-sequential in order to preserve
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binary compatibility with the vmstate dump. Bit 0 (0x0001) was
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previously used for CPU_INTERRUPT_EXIT, and is cleared when loading
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the vmstate dump. */
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/* External hardware interrupt pending. This is typically used for
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interrupts from devices. */
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#define CPU_INTERRUPT_HARD 0x0002
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/* Exit the current TB. This is typically used when some system-level device
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makes some change to the memory mapping. E.g. the a20 line change. */
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#define CPU_INTERRUPT_EXITTB 0x0004
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/* Halt the CPU. */
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#define CPU_INTERRUPT_HALT 0x0020
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/* Debug event pending. */
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#define CPU_INTERRUPT_DEBUG 0x0080
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/* Several target-specific external hardware interrupts. Each target/cpu.h
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should define proper names based on these defines. */
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#define CPU_INTERRUPT_TGT_EXT_0 0x0008
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#define CPU_INTERRUPT_TGT_EXT_1 0x0010
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#define CPU_INTERRUPT_TGT_EXT_2 0x0040
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#define CPU_INTERRUPT_TGT_EXT_3 0x0200
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#define CPU_INTERRUPT_TGT_EXT_4 0x1000
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/* Several target-specific internal interrupts. These differ from the
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preceding target-specific interrupts in that they are intended to
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originate from within the cpu itself, typically in response to some
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instruction being executed. These, therefore, are not masked while
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single-stepping within the debugger. */
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#define CPU_INTERRUPT_TGT_INT_0 0x0100
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#define CPU_INTERRUPT_TGT_INT_1 0x0400
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#define CPU_INTERRUPT_TGT_INT_2 0x0800
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#define CPU_INTERRUPT_TGT_INT_3 0x2000
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/* First unused bit: 0x4000. */
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/* The set of all bits that should be masked when single-stepping. */
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#define CPU_INTERRUPT_SSTEP_MASK \
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(CPU_INTERRUPT_HARD \
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| CPU_INTERRUPT_TGT_EXT_0 \
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| CPU_INTERRUPT_TGT_EXT_1 \
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| CPU_INTERRUPT_TGT_EXT_2 \
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| CPU_INTERRUPT_TGT_EXT_3 \
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| CPU_INTERRUPT_TGT_EXT_4)
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#if !defined(CONFIG_USER_ONLY)
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/* memory API */
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extern ram_addr_t ram_size;
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/* RAM is pre-allocated and passed into qemu_ram_alloc_from_ptr */
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#define RAM_PREALLOC_MASK (1 << 0)
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typedef struct RAMBlock {
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struct MemoryRegion *mr;
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uint8_t *host;
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ram_addr_t offset;
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ram_addr_t length;
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uint32_t flags;
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char idstr[256];
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/* Reads can take either the iothread or the ramlist lock.
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* Writes must take both locks.
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*/
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QTAILQ_ENTRY(RAMBlock) next;
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int fd;
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} RAMBlock;
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typedef struct RAMList {
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QemuMutex mutex;
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/* Protected by the iothread lock. */
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unsigned long *dirty_memory[DIRTY_MEMORY_NUM];
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RAMBlock *mru_block;
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/* Protected by the ramlist lock. */
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QTAILQ_HEAD(, RAMBlock) blocks;
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uint32_t version;
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} RAMList;
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extern RAMList ram_list;
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extern const char *mem_path;
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extern int mem_prealloc;
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/* Flags stored in the low bits of the TLB virtual address. These are
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defined so that fast path ram access is all zeros. */
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/* Zero if TLB entry is valid. */
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#define TLB_INVALID_MASK (1 << 3)
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/* Set if TLB entry references a clean RAM page. The iotlb entry will
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contain the page physical address. */
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#define TLB_NOTDIRTY (1 << 4)
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/* Set if TLB entry is an IO callback. */
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#define TLB_MMIO (1 << 5)
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void dump_exec_info(FILE *f, fprintf_function cpu_fprintf);
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ram_addr_t last_ram_offset(void);
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void qemu_mutex_lock_ramlist(void);
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void qemu_mutex_unlock_ramlist(void);
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#endif /* !CONFIG_USER_ONLY */
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|
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int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
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uint8_t *buf, int len, int is_write);
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#endif /* CPU_ALL_H */
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