qemu-e2k/gdb-xml
Peter Maydell dbd9e08476 target/arm: Advertise MVE to gdb when present
Cortex-M CPUs with MVE should advertise this fact to gdb, using the
org.gnu.gdb.arm.m-profile-mve XML feature, which defines the VPR
register.  Presence of this feature also tells gdb to create
pseudo-registers Q0..Q7, so we do not need to tell gdb about them
separately.

Note that unless you have a very recent GDB that includes this fix:
http://patches-tcwg.linaro.org/patch/58133/ gdb will mis-print the
individual fields of the VPR register as zero (but showing the whole
thing as hex, eg with "print /x $vpr" will give the correct value).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20211101160814.5103-1-peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02 14:14:55 -04:00
..
aarch64-core.xml
aarch64-fpu.xml
arm-core.xml
arm-m-profile-mve.xml target/arm: Advertise MVE to gdb when present 2021-11-02 14:14:55 -04:00
arm-m-profile.xml target/arm: Use correct GDB XML for M-profile cores 2020-05-14 15:03:08 +01:00
arm-neon.xml target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML 2021-09-30 13:42:10 +01:00
arm-vfp-sysregs.xml target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML 2021-09-30 13:42:10 +01:00
arm-vfp.xml target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML 2021-09-30 13:42:10 +01:00
arm-vfp3.xml target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML 2021-09-30 13:42:10 +01:00
avr-cpu.xml target/avr: CPU class: Add GDB support 2020-07-10 17:58:32 +02:00
cf-core.xml
cf-fp.xml
i386-32bit.xml gdbstub: Fix i386/x86_64 machine description and add control registers 2019-02-05 16:50:18 +01:00
i386-64bit.xml gdbstub: Fix i386/x86_64 machine description and add control registers 2019-02-05 16:50:18 +01:00
m68k-core.xml target/m68k: fix gdb for m68xxx 2020-05-06 09:29:26 +01:00
m68k-fp.xml target-m68k: define 96bit FP registers for gdb on 680x0 2017-06-21 22:11:12 +02:00
power-altivec.xml
power-core.xml
power-fpu.xml
power-spe.xml
power-vsx.xml
power64-core.xml
riscv-32bit-cpu.xml RISC-V: Add 32-bit gdb xml files. 2019-03-19 05:13:24 -07:00
riscv-32bit-fpu.xml RISC-V: Add 64-bit gdb xml files. 2019-03-19 05:13:24 -07:00
riscv-32bit-virtual.xml target/riscv: Expose "priv" register for GDB for reads 2019-10-28 07:47:29 -07:00
riscv-64bit-cpu.xml RISC-V: Add 64-bit gdb xml files. 2019-03-19 05:13:24 -07:00
riscv-64bit-fpu.xml RISC-V: Add 64-bit gdb xml files. 2019-03-19 05:13:24 -07:00
riscv-64bit-virtual.xml target/riscv: Expose "priv" register for GDB for reads 2019-10-28 07:47:29 -07:00
rx-core.xml target/rx: CPU definitions 2020-03-19 17:58:05 +01:00
s390-acr.xml
s390-cr.xml
s390-fpr.xml
s390-gs.xml s390x/gdb: add gs registers 2017-07-14 12:29:49 +02:00
s390-virt.xml
s390-vx.xml
s390x-core64.xml