qemu-e2k/hw/intc
Hollis Blanchard 2531088f6c hw/intc/arm_gic: add tracepoints
These are obviously critical to understanding interrupt delivery:
gic_enable_irq
gic_disable_irq
gic_set_irq (inbound irq from device models)
gic_update_set_irq (outbound irq to CPU)
gic_acknowledge_irq

The only one that I think might raise eyebrows is gic_update_bestirq, but I've
(sadly) debugged problems that ended up being caused by unexpected priorities.
Knowing that the GIC has an irq ready, but doesn't deliver to the CPU due to
priority, has also proven important.

Signed-off-by: Hollis Blanchard <hollis_blanchard@mentor.com>
Message-id: 1461252281-22399-1-git-send-email-hollis_blanchard@mentor.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2016-05-16 17:20:41 -07:00
..
allwinner-a10-pic.c
apic_common.c
apic.c
arm_gic_common.c
arm_gic_kvm.c
arm_gic.c hw/intc/arm_gic: add tracepoints 2016-05-16 17:20:41 -07:00
arm_gicv2m.c
arm_gicv3_common.c
arm_gicv3_kvm.c
armv7m_nvic.c
aspeed_vic.c
bcm2835_ic.c
bcm2836_control.c
etraxfs_pic.c
exynos4210_combiner.c hw/intc: QOM'ify exynos4210_combiner.c 2016-05-12 13:22:24 +01:00
exynos4210_gic.c hw/intc: QOM'ify exynos4210_gic.c 2016-05-12 13:22:24 +01:00
gic_internal.h
grlib_irqmp.c hw/intc: QOM'ify grlib_irqmp.c 2016-05-12 13:22:25 +01:00
heathrow_pic.c
i8259_common.c
i8259.c
imx_avic.c hw/intc: QOM'ify imx_avic.c 2016-05-12 13:22:24 +01:00
ioapic_common.c
ioapic.c
lm32_pic.c
Makefile.objs
omap_intc.c hw/intc: QOM'ify omap_intc.c 2016-05-12 13:22:25 +01:00
openpic_kvm.c
openpic.c
pl190.c hw/intc: QOM'ify pl190.c 2016-05-12 13:22:25 +01:00
puv3_intc.c
realview_gic.c
s390_flic_kvm.c
s390_flic.c
sh_intc.c
slavio_intctl.c hw/intc: QOM'ify slavio_intctl.c 2016-05-12 13:22:25 +01:00
vgic_common.h
xics_kvm.c
xics.c
xilinx_intc.c