Peter Maydell 7d197d2db5 target-arm: Fix IL bit reported for Thumb VFP and Neon traps ... All Thumb Neon and VFP instructions are 32 bits, so the IL bit in the syndrome register should be set. Pass false to the syn_* function's is_16bit argument rather than s->thumb so we report the correct IL bit. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com> Message-id: 1454683067-16001-4-git-send-email-peter.maydell@linaro.org		2016-02-11 11:17:32 +00:00
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arch_dump.c	arm: Clean up includes	2016-01-29 15:07:23 +00:00
arm_ldst.h
arm-semi.c
cpu64.c	target-arm: Enable EL3 for Cortex-A53 and Cortex-A57	2016-02-11 11:17:31 +00:00
cpu-qom.h	target-arm: Use a single entry point for AArch64 and AArch32 exceptions	2016-01-21 14:15:08 +00:00
cpu.c	target-arm: Don't report presence of EL2 if it doesn't exist	2016-02-03 13:54:41 +00:00
cpu.h	target-arm: Add isread parameter to CPAccessFns	2016-02-11 11:17:31 +00:00
crypto_helper.c
gdbstub64.c
gdbstub.c
helper-a64.c	target-arm: Move aarch64_cpu_do_interrupt() to helper.c	2016-01-21 14:15:08 +00:00
helper-a64.h
helper.c	target-arm: Implement NSACR trapping behaviour	2016-02-11 11:17:31 +00:00
helper.h	target-arm: Add isread parameter to CPAccessFns	2016-02-11 11:17:31 +00:00
internals.h	target-arm: Correct misleading 'is_thumb' syn_* parameter names	2016-02-11 11:17:31 +00:00
iwmmxt_helper.c
kvm32.c
kvm64.c
kvm_arm.h
kvm-consts.h
kvm-stub.c
kvm.c
machine.c
Makefile.objs
neon_helper.c
op_addsub.h
op_helper.c	target-arm: Add isread parameter to CPAccessFns	2016-02-11 11:17:31 +00:00
psci.c
translate-a64.c	target-arm: Add isread parameter to CPAccessFns	2016-02-11 11:17:31 +00:00
translate.c	target-arm: Fix IL bit reported for Thumb VFP and Neon traps	2016-02-11 11:17:32 +00:00
translate.h